2017-11-07 03:49 AM
Solved! Go to Solution.
2018-02-11 05:50 AM
Seems I found the problem.
The CubeMX generated code enters the 'default' trimming value for the HSI, which is according to the datasheet and CubeMX 0x10 (16).
LL_RCC_HSI_SetCalibTrimming(16);
This causes large deviations of the clock and so the baud rate is off and frame error occurs.
If I mask this line in the code I see the
default value is actually 0x40 and not 0x10(HSITRIM in ICSCR), and in this case all functions well.
I will add a discussion regarding this to see STs comment.
2017-11-09 03:36 AM
no one is able to help?
2018-02-11 05:50 AM
Seems I found the problem.
The CubeMX generated code enters the 'default' trimming value for the HSI, which is according to the datasheet and CubeMX 0x10 (16).
LL_RCC_HSI_SetCalibTrimming(16);
This causes large deviations of the clock and so the baud rate is off and frame error occurs.
If I mask this line in the code I see the
default value is actually 0x40 and not 0x10(HSITRIM in ICSCR), and in this case all functions well.
I will add a discussion regarding this to see STs comment.
2018-03-24 07:36 AM
May I trouble you with a quick q?
i have a new application that spends most of its time in STOP2 mode, but also needs to accept inbound comms at 9600bps reliably. It doesn’t matter how much power it takes or what clock is used once awakened, but inbound 9600bps comms must be reliable with no dropped chars or framing errors.
i have an stm32l4+ prototype board, and for the life of me I cannot get it to wake from stop2 on lpuart reception. Nor can I find sample code or guidelines; your code above seems the best that I’ve been able to find, and it still doesn’t work for me. I must say that I am totally unclear on what needs to be re-enabled manually after wake up, since I had assumed that all clocks/etc were just restarted automatically when it wakes into run mode.
i have not yet tried setting the trim, but before I do, I just have a couple basic questions:
- can lpuart1 be configured as above, using hsi, to reliably wake up and receive at 9600bps? (If so, is there an example project lying around somewhere that I can test and adapt?)
- or, alternatively, must I redesign my board to have an external crystal and thus use LSE for lpuart1?
This is kind of a time sensitive question because I have a 1 week deadline for design changes on the next rev of the board.
thanks much for your generous assistance.
2018-03-25 06:56 AM
Yes, 9600 can wake the LPUART reliably without losses of bytes, I managed to have it work with 115
HSI will work fine, I use HSI. LSE limits you to 9600 if I'm not mistaken.
The thing I've noticed is that if the wakeup clock of the system after waking from Stop Mode is different than the clock used for LPUART, you must re-enable the clock. For example, in my system theclock the system uses after wakeup is MSI and the LPUART uses HSI so in the interrupt I must re-enable HSI.
See my post
https://community.st.com/0D50X00009XkW1lSAF
about this issue.Hope that helps