Possible to use all 3 DAC channels simultaneously?

[Cbee.1]

In reading the manuals and datasheets, it seems like it should be possible to simultaneously use all 3 channels (DAC1 Channel 1, DAC1 Channel 2, and DAC2 Channel 1) of the onboard DACs at once, emitting separate values on each. However, no matter what I've done, I can't seem to get PA6 to do anything but float. PA4 and PA5, the DAC1 channels, both work exactly as expected, and both DACs are in the READY state, but PA6 never emits anything.

Happy to post any portion of the code or registers here but most of it is the standard Cube autogen.

This is with the NUCLEO-H7A3ZI-Q 144-pin board.

[TDK]

If you initialize PA6 as a GPIO, can you toggle it? If so, print out the DAC2 register values in the non-working configuration.

[Cbee.1]

The pin does toggle on and off (0V and 3V3, as expected). Here's the register values after initializing and starting DAC2, then setting a value:

Name : Instance (hdac2)
	Details:0x58003400
 
Name : CR
	Details:0
 
Name : SWTRIGR
	Details:0
 
Name : DHR12R1
	Details:0
 
Name : DHR12L1
	Details:0
 
Name : DHR8R1
	Details:0
 
Name : DHR12R2
	Details:0
 
Name : DHR12L2
	Details:0
 
Name : DHR8R2
	Details:0
 
Name : DHR12RD
	Details:0
 
Name : DHR12LD
	Details:0
 
Name : DHR8RD
	Details:0
 
Name : DOR1
	Details:0
 
Name : DOR2
	Details:0
 
Name : SR
	Details:0
 
Name : CCR
	Details:16
 
Name : MCR
	Details:0
 
Name : SHSR1
	Details:0
 
Name : SHSR2
	Details:0
 
Name : SHHR
	Details:1
 
Name : SHRR
	Details:1
 
Name : State
	Details:HAL_DAC_STATE_READY
 
Name : Lock
	Details:HAL_UNLOCKED
 
Name : DMA_Handle1
	Details:0x0
 
Name : DMA_Handle2
	Details:0x0
 
Name : ErrorCode
	Details:0

[TDK]

> Name : CR

> Details:0

Would indicate EN1=0, so the channel is not active.

> Name : State

> Details:HAL_DAC_STATE_READY

Would indicate HAL doesn't think it's active either. Are you sure you're calling the right functions to enable? Do all HAL functions return HAL_OK?

[Cbee.1]

These autogenerated functions are both being called:

MX_DAC1_Init();
MX_DAC2_Init();

The DAC channels are manually started as so:

HAL_DAC_Start(&hdac1, DAC_CHANNEL_1);
HAL_DAC_Start(&hdac1, DAC_CHANNEL_2);
HAL_DAC_Start(&hdac2, DAC_CHANNEL_1);

Each is set with HAL_DAC_SetValue like so:

HAL_DAC_SetValue(&hdacX, DAC_CHANNEL_X, DAC_ALIGN_12B_R, data);

I've stepped through the initialization and start functions. HAL_OK is the result of all of them. I've also double-checked all the configuration and as far as I can tell the configuration is identical between DAC1 and DAC2 (except for the lack of a channel 2 in DAC2).

[TDK]

EN1 should be getting set right here in HAL_DAC_Start.

https://github.com/STMicroelectronics/STM32CubeH7/blob/ccb11556044540590ca6e45056e6b65cdca2deb2/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dac.c#L534

If you step through that line and it's still not set, not sure what could be going on.

[Cbee.1]

Yeah, it's quite perplexing, I'd assumed maybe the pin was dead or there was a short, but clearly that's not the case. My best guess, given I checked the SFRs and there only appear to be two total registers for the DACs, is that only two of them can be run simultaneously. Perhaps someone else will know. Thanks for the help!

[Bassett.David]

Hello,

Just grasping at straws here, but notably the single-channel DAC is in the "SRD Domain", whereas the dual channel DAC is in the "CD Domain" along with the majority of peripherals. I don't have experience with the '7A or '7B devices, but maybe the HAL is neglecting to prepare the SRD Domain or presuming it's already setup?

Good luck!

Dave

[Cbee.1]

Thanks for the advice, Dave! It's entirely possible this is correct, and might help to explain why the inspected registers all read 0 despite each of the methods returning HAL_OK. Unfortunately I'll have to do some research on how I might modify or overload the init code for memory-sharing between domains, so I can't test that offhand, but I'll make sure to check back here if I make progress.

Edit: I'm pretty sure it's not related to the smart run domain being disabled given that GPIO seems to be running fine on it.