overwriting the data registers of the ADC and DAC in STM32G4

[mete]

On STM32G474, I have a loop where I read ADC values, process them, and write the result to DAC.

I am using the dual ADC mode and reading ADC12_COMMON->CDR . I do not care if I read the previous conversion result, in this case, is there a reason to check and reset ADC_ISR_EOS ? Does the CDR always contain the last conversion result ?

Similarly, when using the DAC, can I continuously (most probably faster than DAC update rate) write to DAC_DHR12R1 without checking any flag ? I do not care if I overwrite the previous value before it is transferred to DAC_DOR.

[TDK · Accepted solution]

> in this case, is there a reason to check and reset ADC_ISR_EOS ? Does the CDR always contain the last conversion result ?

You don't need to clear EOS if you don't care about it--the ADC will still convert. You may want to set OVRMOD to ensure the register always has the latest conversion.

> Similarly, when using the DAC, can I continuously (most probably faster than DAC update rate) write to DAC_DHR12R1 without checking any flag ?

Yes.