2025-01-22 05:00 AM
Hello everyone,
I hope you’re all doing well! I’m currently struggling to get one of the directly connected ADCs on the STM32H723ZG working at 75 MHz, which is the maximum sample rate according to the datasheet.
I’ve selected ADC3_INP1 since it’s supposed to be one of the four fastest channels available. I’ve attached a picture of my configuration, but I’m having trouble with the clock setup. The system can't find any configuration that achieves the desired 75 MHz for the ADC. The best I’ve managed is to manually adjust PLL2 to get bit higher than 76 MHz, but that doesn’t feel quite right. I need high accuracy for several measurements, and I know the MCU cannott exceed 75 MHz for the direct ADCs at 12 bits.
As you can see in the picture of the clock configuration, the system is connected to a 50 MHz external crystal, and the system clock is set to 300 MHz. This setup is intended to achieve 75 MHz for the peripheral clocks attached to APB1, which includes DAC1 and DAC2, that I plan to use later at that frequency.
(I use ADC3, which is connected to PC2_C and/or PC3_C. However, I’m having difficulty finding an available pin on the board to test PA1_C in the UM2407 user manual is not to find. If anyone knows where this pin might be located, I would greatly appreciate your guidance)
Thank you all for your help!
2025-01-22 06:47 AM
Datasheet says max 50 MHz.
https://www.st.com/en/microcontrollers-microprocessors/stm32h723zg.html#documentation
p. 185