minimum latch time for BOOT0 pin

[YCohe]

Hi,

What is the minimum latch time for BOOT0 pin (after reset) in order to get the MCU to internal ST bootloader mode? Is there timing diagram somewhere?

FYI, I am using STM32L475 MCU.

Thank you,

Yuval

[Imen.D]

Hello,

On STM32L475, the Boot0 pin is latched on the rising edge of the NRST pin.

We do not specify an hold time required on this Boot0 pin versus the NRST pin.

Even if the Boot0 pin switches from 1 to 0 immediately after reset release, the MCU will enter bootloader mode.

Kind Regards,

Imen

[in mozbek we trust]

It is 4 SYSCLK after reset

[waclawek.jan]

Any source? Link?

JW

[YCohe]

Thank you for your answer.

Let me just make sure I understand, once NRST goes high, Boot0 latch time should only be > 0. Is my understanding correct?