Posted on January 14, 2016 at 08:37Hello, Mayla. Thx for your reply.
my own functions for GPIO initialization is only cover for the standart HAL_GPIO_INIT(), to avoid declaring structures to init them.
Yes, i'm already done it from the example you point to - the same result.
But i think that i found some mistakes in standart libraries, there is it:
HAL_StatusTypeDef HAL_SPI_TransmitReceive ( SPI_HandleTypeDef *hspi,
uint8_t *pTxData,
uint8_t *pRxData,
uint16_t Size,
uint32_t Timeout )
{
/..../
if
((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1))
{
/* set fiforxthreshold according the reception data length: 16bit */
CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
}
else
{
/* set fiforxthreshold according the reception data length: 8bit */
SET_BIT(hspi->Instance->CR2,
SPI_RXFIFO_THRESHOLD
);
}
/..../
there is set the same bit for different FIFO treshold modes.
i think my problem is refer to the FIFO workaround.
and when i poll for BSY_FLAG against the RXNE_FLAG - program wait some iterations and return the data, but data always = 0;
the problem is similar for the different chips with SPI interface, maybe i can test it if connect MISO and MOSI between each other - to test the FIFO's?
I dont have an logic analyzer, so i cant show to you full picture about incomming and outcomming data. With the f417 device all i need works fine, there is no FIFO for spi.
