2024-04-16 01:29 PM
@Alex - APMemory I am trying interface APS6408L on the B-U858I-IOT02A Discovery Kit in OSPI DTR memory mapped mode for both read and writes. The datasheet for APS6408L mentions that the page size for it is 1Kb.
In the memory mapped mode, is it possible to write in a chunk greater than 1Kb for the RAM? I am read this for the memory in the datasheet,
"Burst Type & Length
Read and write operations are default Hybrid Wrap 32 mode. Other burst lengths of 16, 32, 64 or 1K bytes in
standard or Hybrid wrap modes are register configurable(see Table 20). The device also includes command for
Linear Bursting. Bursts can start on any even address. Write burst length has a minimum of 2 bytes. Read has no
minimum length. Both write and read have no restriction on maximum burst length as long as tCEM is met."
I am using memcpy for writing the data in the memory mapped mode. My question is, is it possible to write in blocks greater than 1Kb for this memory?
-Rikesh
2024-04-16 01:55 PM
Hi Rikesh,
Maximum Write is 1 page (1024Byte for 64Mb, 2048Byte for 256Mb), and not limited for Read (RBX), subject that maximum burst length as long as tCEM is met.
I hope this help to reply to your question
Alex
2024-04-16 02:04 PM
@Alex - APMemory , Thanks for your prompt response. I was assuming that the maximum write burst length of 1024 is only applicable for linear burst write(A0h). Is this true for sync Write(command 80h) as well.
I was using memory mapped mode and trying to write data using etl::copy functions,
2024-04-16 06:07 PM
Could you share share these details, or how your implementation differs these details please?
2024-04-16 08:33 PM
@alister , Below are the details of my implementation,
I am doing this for just RAM testing at present,
* I am using the BSP driver for APS6408L provided by ST for the B-U858I-IOT02A Discovery Kit thats uses OSPI DTR in memory mapped mode.
* I have been trying to test the RAM by disabling the cache(although I did try enabling it and did not see any difference)
* For testing I have PSRAM read and write functions, that read and write in 32 bit aligned word on the PSRAM. I am only copying test data from SRAM to PSRAM(without using the DMA). My read and write functions are below,
2024-04-17 06:10 AM
@Alex - APMemory @alister One additional question, how does Row Boundary Crossing affect the memory mapped mode?
2024-04-17 06:17 AM
Hi Rikesh,
Linear Burst Commands are required to support RBX Read
To write 1024B you need to write 1 full page, not crossing the Boundary (no RBX write)
This is apply to memory, whichever memory mapped mapped mode or other
Alex
2024-04-17 06:35 AM
@Alex - APMemory Does this mean I cannot do operation like memcpy for sizes greater than 1Kb?
HOw can I handle sizes greater than 1Kb in memory mapped mode? Appreciate if you could elaborate .
-Rikesh
2024-04-17 03:12 PM
I'm linking to this other thread for completeness, and honestly to find / navigate later. https://community.st.com/t5/stm32-mcus-products/stm32u585-memory-mapped-read-write-on-b-u585i-iot02a/td-p/663439
2024-04-17 03:50 PM
No.
You can't test you're performing 1kb byte bursts by software, except perhaps by measuring the CPU cycles, allowing for test overheads and applying some inference. You could test using an oscilloscope or logic analyser however.
You've mentioned you'd experimented disabling cache, but that is puzzling, as where would the 1k bytes of test data be queued except in cache, and with cache disabled, how do you expect the CPU wouldn't stall on each access while it completes an individual access to the flash? Are you expecting the AXI would start a 1k burst while your code is accessing to the 1k in the internal address space and pause the QSPI CLK while the CPU is slower and stall the CPU while the QSPI is slower? Can the STM32U5 do that? You mention "did not see any difference". Are you only comparing the data values? You need to measure the time.
Don't list your software. Is your "memory mapped" the same as RM0456 rev 5 section 28 describes? Please explain the engineering of reading/writing the OSPI flash as 1k byte bursts while it's in memory-mapped mode.