2018-01-17 09:44 PM
I have a question regarding the WWDG in STM32F103RB.
I know the Maximum value of the APB1 clock can be 36 MHz. I suppose using the least value of the APB1 will give us the max timeout, but I am not able to figure what can it be.
#watchdog #wwdg #stm322018-01-18 01:05 AM
From the reference manual, section on Reset and Clock-control
APB1 frequency is determined by a pre-scaler/divider from AHB frequency; the divider can be 1, 2, 4, 8 or 16.
AHB frequency is determined by a pre-scaler/divider from SYSCLK; the divider can be 1, 2, 4, 8, 16, 64, 128, 256 or 512.
So how slow APB1 can be depends how slow you can run your processor and AHB bus.
Personally, I wouldn't normally run the processor slower than 8 MHz because that's what it starts at.
And from 8 MHz / 512 / 16 = 976 Hz approx.
Hope this helps,
Danish
2018-01-18 04:00 AM
Thank You Danish, that was a comprehensive reply that clears my doubt.
Cheers,Arjun Oberai
2018-01-21 05:20 PM
Hi Danish,
I used the HSI as my System Clock Source i.e 8 MHZ. The SYSCLK is not divided at AHB and APB1. After that, I analyze the timeout value of my WWDG is 415ms rather than closer to 144 ms (theoretically calculated using the timeout formula). Following is my System Clock Code:/** System Clock Configuration **/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
/**Configure the Systick interrupt time
*/
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
/**Configure the Systick
*/
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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What can be theexplanation to this timeout value?
Cheers,Arjun