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Max toggle rate using timers on stm32h503rb6

Anirudhoruganti
Associate II

I am trying to toggle PB6 gpio at 10MHz on the nucleo board. I am trying to use timers to do this. Using LL library with full optimization and 250MHz system clock rate. I was able to get 3.5MHz ish. With timer 1 prescaler and divider being 0. Please help me understand how/if possible to reach 10MHz gpio toggle rate. 

8 REPLIES 8
Anirudhoruganti
Associate II

I’m trying implement custom protocol and not able to use DMA to do this. I’ve also tried writing to gpio register directly to try reach this rate but not too successful. 

Let the TIM toggle the pin associated with the channel, ie TIMx_CHx

Don't expect to interrupt at high rates

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AScha.3
Chief II

On H563 (same core) at 250MHz my test , just toggle a pin in a loop, shows 16ns loop time, so 62MHz are the max. possible toggle rate in software (doing nothing else ! 100% cpu load; highest pin speed setting and -O2.).

With hardware (mco, timer ...) output, you can reach 200MHz at low cap.load :

AScha3_0-1725694224624.png

...from ds H503 .

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Anirudhoruganti
Associate II

For the stuff I’m doing, I would need to toggle it in a ISR at the end of the timer’s count(or similar which ever is faster). Doing it in a loop I was able to get around 60MHz. I’m more looking for on how to make the timer interrupt callback faster.  Any source code would be greatly appreciated. 

 

Toggling a GPIO in an interrupt at max frequency is not a useful thing to do. What are you really trying to achieve? The more code you have in a callback the slower it will be. No way around that. No magic pill to make things fast. Better code, better optimizations will be faster. Implement the IRQ handle directly and not with HAL.

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I’m currently using LL library with Irq only containing about one line of code which is: 

GPIOC->ODR ^=1<<10;

 

I’m using this method to see what’s the fastest rate my irq could be called back. I’m using -Ofast optimization 

Avoid doing RMW on registers, the load/store will take many cycles.

Use GPIO->BSRR writes to set or clear bit(s)

You can DMA patterns to BSRR too

 

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> what’s the fastest rate my irq could be called back

Expect to need at least 30 or so clocks per IRQ, 24 of which are just entering/exiting the interrupt, which puts your max IRQ speed in the 5-10 MHz range with a 250 MHz clock.

> I’m currently using LL library with Irq only containing about one line of code

So you don't check or clear flags in the IRQ? How is that useful?

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