2021-11-18 01:24 PM
Hi!
I have a STM32F373VBT MCU and I have issues with LSE.
First I have selected this crystal.
Because STM32 documention recomended it for my processor.
Also I notice that I need to have high drive for my crystal because it has a 12.5 pF load capacitance.
I enable high drive mode in CubeMX.
Here is the layout where I placed the crystal and its capacitors. Each capacitor is 15 pF.
Here is the problem. I get stuck here in the code. Under the comment Set the new LSE configuration
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
{
FlagStatus pwrclkchanged = RESET;
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
{
__HAL_RCC_PWR_CLK_ENABLE();
pwrclkchanged = SET;
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
/* Check the LSE State */
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT; <---------------------------------------------Here .
}
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
I have tried different type of capacitors:
I have also measure the voltage:
Vcc: 0 V
Voltage before LSE (PC15): 1080-1083 mV
Voltage after LSE (PC14): 568-569 mV
VBAT: 3.02 V
Vcc: 3.19 V
Voltage before LSE (PC15: 1252-1253 mV
Voltage after LSE (PC14): 721-722 mV
VBAT: 3.02 V
Question:
Why does my LSE crystal clock not start in CubeMX? I still get TIME OUT, even if the TIME OUT limit is 10 seconds.
2021-11-18 10:52 PM
Did you set the LSEState to RCC_LSE_ON somewhere else?
2021-11-18 11:05 PM
Yes I did. Before in the SystemClockConfig in main.c file.
2021-11-19 12:07 AM
Crystals on the LSE are extremely sensitive to external signals. You have kindly enclosed the extract from the layout, in which no GND can be seen under the crystal, but a number of GPIO lines.
Please take a look at AN2867, Fig. 14 (PCB with separated GND plane and guard ring around the oscillator), which shows very nicely how the layout for crystals should be designed: there is a red guard ring around the crystal, which is connected with vias to the light blue GND island below. Please note that it is separated from the rest of the blue GND layer and is only connected centrally to the GND of the STM32. This GND island and the red guard ring form some kind of a "GND tub" looking like a "hand holding a stone", so to speak, in which the crystal and the two CL are located.
Additionally you should shorten the tracks between OSCIN/OSCOUT and the crystal as much as possible.
Regards
/Peter
2021-11-19 03:06 PM
So in this case. I need to rewrite my PCB board and redraw as Fig. 14 shows? Nothing else I can do?
2021-11-22 01:56 AM
There are essentially two issues that can be addressed if the crystal does not oscillate correctly: hardware (layout and component parameters) and software.
While software and component parameters can usually be changed at any time without great effort, the board must also be changed to change the layout. So yes, at least you'd have to change the PCB.
Regards
/Peter
2021-11-22 02:05 AM
Yes, crystals can be sensitive, but it's not that bad at 32kHz.
So before re-designing the PCB, I'd check the all RCC / LSE register settings.
Start with 15pF, and check with a scope. But mind that the probe's capacitance can be a problem and that the oscillation levels are usually very low.
PS: I hope there's a GND-plane between the top and the PCB layer with the green tracks...
2021-11-22 09:05 AM
2021-11-22 09:05 AM
Why is the LSE so sensitive, compared to the HSE?
2021-11-22 10:46 AM
If you want to measure oscillations at the LSE you have to use a low-capacitance oscilloscope probe (no more than 1pF input capacitance).
You didn't show the GND plane above, but that's not enough. As mentioned, the GND plane for the crystal must be separated and connected with its own connection directly to the GND pin of the STM32, NOT to a large, continuous GND plane between top and bottom.
Regards
/Peter