Dear ST community,
on a STM32H7A3ZIT6 MCU running at 280 MHz, I need to transfer blocks consisting of up to 2^19 (524288) half-words (16 bits) to a 16 bit parallel interface DAC connected via Port F and the DAC clock connected to PE9. Sample rate should be at least 20 MHz, but up to 50 MHz may be desired.
Any arbitrary block size between 2 and 524288 needs to be supported. It is crucial for my application that the operation is seamlessly circular, which means that after the last transfer happened, the process needs to be immediately restarted from the initial source address.
The transfer is characterized as following:
- DMA 1 Stream 0
- DMA request is TIM1_CH1
- Memory To Peripheral
- Source is the 1 Mbyte RAM starting at 0x24000000; Source address is automatically increased by 2 bytes each transfer (half-word operation)
- Destination is GPIOF->ODR; Destination address is not increased
Timer 1 is configured for PWM operation which generates a clock for the DAC and simultaneously provides the DMA request.
Of course, this works effortlessly for block sizes of up to 65534 as this is the maximum block size the DMA supports. Going beyond this requires additional effort.
One idea is to use the dual-memory-address mode which alternates between two initial source addresses. This allows me to modify the source address which is currently not in use, enabling infinitely large block transfers at high speed with low CPU usage. Unfortunately, at some point, I also need to modify the transfer length as I cannot divide the arbitrary block length into evenly sized chunks.
Is there a solution to this problem or do I need to accept the fact that it is not possible to seamlessly transfer blocks of arbitrary length using the DMA?
Thank you and kind regards
