Posted on August 31, 2016 at 22:14More (still RM0090, rev.12):
- in Tab.206 the text for OTG_HS_DOEPINTx is copy/pasted from OTG_HS_DIEPINTx, including the link. The same goes for OTG_FS_DOEPINTx in Tab.198.
- in both Tab198 and Tab.206, the endpoint-dependent registers have inconsistently displayed their address offset - some list multiple addresses, some list only one address
- OTG_HS_DIEPINTx contains BERR and NAK bits, for which there appear to be no mask bits. However, the Cube FW does not handle them, indicating that they *are* masked somehow. Also, why would an *IN* endpoint indicate babble? Please explain.
- similarly, OTG_HS_DOEPINTx contains a NYET bit, with apparently no corresponding mask in OTG_HS_DOEPMSK. OTOH, in OTG_HS_DOEPMSK there are two masks, OPEM and BOIM, with no corresponding interrupt flags in OTG_HS_DOEPINTx.
- the mysterious (see post above) OTG_HS_DOEPEACHMSK1 contains a mask for babble error (mis-spelled as ''bubble error''
🙂 ) and also for NAK and NYET; however, that would be only for EP1, and still does not explain other inconsistencies mentioned above. Please clean up thoroughly.
- speaking of babble, in OTG_FS in the list of [device a.k.a. peripheral] endpoint status/interrupt on p.1253 (part of USB peripheral sub-chapter), mentions ''Babble error condition has been detected''; however, there is no mention of babble error bit/mask in OTG_FS_DOEPMSK nor OTG_FS_DOEPINTx
- OTG_HS_DOEPDMAx is missing from Tab.206
- OTG_HS_DIEPDMA0/OTG_HS_DOEPDMA0 missing from Tab.211 and both at description of OTG_HS_DIEPDMAx/OTG_HS_DOEPDMAx at p.1468 and in Tab.206 there is ''x = 1..5''. Does this mean that EP0 is NOT handled by DMA? The Cube software appears to indicate otherwise. Also the footnote of registers description on p.1468 mentions ''control endpoints'' which in every practical USB implementation implies EP0, which would also indicate that DMA *is* available for EP0. Explain/clean-up, please.
- what are the OTG_HS_DIEPDMABx/OTG_HS_DOEPDMABx registers in Tab.211?
- PLEASE sort Tab.211 in ascending register address/offset
- also please don't intertwine the IN and OUT inedpoints' registers in the registers section (following address/offset order would be more logical, too)
- most of the OTG_HS registers are missing from the Index at the end of RM
- even if this has been cleaned up already a bit, there are still inconsistent hexadecimal numbers (with h suffix) around, e.g. in the CSR memory map (and in other chapters e.g. ETH, SDIO) too. Searching for ''00h'' reveals quite a few of them even if not all. The funniest is ''0xX000h'' in Tab.207 (note that the ''parallel'' Tab199 is OK).
These all are randomly spotted apparent errors. The functional description was hard to read and it is likely to contain deficiencies if not outright errors too. I don't work on Host nor OTG so I expect there are much more; both chapters deserve a thorough cleanup. Oh, I know, handwaves and pointing to Cube; again, I am old fashioned but IMO datasheet/manual comes first.
JW
