2021-03-21 02:19 PM
Hello! I'm in the process of adapting code I wrote for the STM32F4 series to the new G4 series and I've ran into an issue. When I try to start a new DMA transfer on completion of the current one by running HAL_DAC_Start_DMA from the HAL_DAC_ConvCpltCallbackCh1 routine this only works once and no subsequent interrupt is generated when that conversion is complete.
On the F4 series this worked fine, but now I can only get it to work by setting a flag in the callback and then initiating a new transfer from my main loop. Are these functions implemented differently on the G4 series or could I be overlooking a hardware issue? Perhaps there is a more recommended way of doing this?
BTW: I'm using the V1.4.0 Cube Firmware
Solved! Go to Solution.
2021-03-26 01:01 PM
I was able to resolve the issue eventually, by moving away from the HAL and diving into the datasheet. Something I feel I should have done earlier maybe :D
I found that there has to be a short delay between disabling the DMA channel and resetting the interrupt flag. Because after the first interrupt the CNDTR register was not being written to.
2021-03-26 11:06 AM
Hello @deltronix and welcome to the STM32 Community :)
This is the basic concept and there is no difference between the STM32F4 and STM32G4 implementation.
Please check the USE_HAL_DAC_REGISTER_CALLBACKS value in conf.h file
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
hdac->ConvCpltCallbackCh1(hdac);
#else
HAL_DAC_ConvCpltCallbackCh1(hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
Let me know if your issue is solved, if so please "Select as Best" button, this can be very helpful for Community users to find this solution more quickly.
If you still need help, feel free to ask with more details.
Imen
2021-03-26 11:23 AM
That seems like you have a wrong setting regarding continuous/discontinuous/scan conversion setting.
2021-03-26 01:01 PM
I was able to resolve the issue eventually, by moving away from the HAL and diving into the datasheet. Something I feel I should have done earlier maybe :D
I found that there has to be a short delay between disabling the DMA channel and resetting the interrupt flag. Because after the first interrupt the CNDTR register was not being written to.
2021-03-29 03:22 AM
Hi @deltronix ,
Glad to know the issue has been solved.
Please allow me to close this thread by marking your answer as Best and thank you for your contribution.
Imen