Is it possible to have two MOSI and two MISO line on 1 SPI bus ?

[DRous.1]

I'm using the STM32F411RE and I want to communicate with the SPI protocole to an external chip. The version of the chip is basically two single chip on 1 board so the SPI wiring only takes 1 CLK and 1 CS, but is using two MOSI line and two MISO line (one for each chip on the board). So one of my option was to use two SPI bus for each chip. But since there is only 1 CLK, I wasnt sure if this was the best idea even though both CLK would be toggle at the same time since there are connected to the same APB peripheral (from what I understand..). The other option would be to have to MOSI line and MISO line activated on 1 SPI bus. Would that be possible to do without having to change the GPIO_InitStruct.Pin every time. If both of those options are not possible, I have a final approach that would work using a dual data rate technique but would not give me the freedom of communicating with both chip independently. I would be muxing both of the 32 bits signal into a 64 bit message on a single MOSI line and splitting the data on both mosi line with a flip-flop. (Which would pretty much ack as a hardware version of a mask)

[S.Ma]

It's kind of weird as having separate NSS1/NSS2 yields less wires for the same time multiplexed job with 2 slaves in 1. Yes, the pin alternate functions can be switched dynamically, so you can reconfigure the MOSI1 from one pin to another. To avoid glitches, I would recommend to turn pins as input first then change the input to alternate. I don't use HAL_GPIOs, rewrote it for intuitivity and simplicity here and it's no use for the F411RE as some info needs to be edited.

If you want to talk to both chips in // and they can share the same packet length, then use 2 SPI, one in master, the other one in slave mode fed with the master SCK.

So it depends how you'd like to communicate with the remote chip.