2020-11-24 09:48 AM
Dear
I have configured TIM1 Channel1 as PWM and I would like to use the NPWM feature too.
Therefore I have configuted the channel as PWM NPWM channel and set the according GPIOs.
I must have made a mistake in the MXCube configuration.
The PWM output performs as expected while the NPWM output is always low.
Has anyone a idea what ist wrong?
Best regards
Martin
2020-11-24 01:16 PM
What is NPWM?
Read out and check/post the relevant TIM and GPIO registers content.
JW
2020-11-24 08:45 PM
Dear.
in MXCube you can set the Timer output to PWM and NPWM. NPWM is the inverted PWM. SO the timer generates a PWM signal and the inverted signal. Both signals shall be available at the pins of the CPU.
Best regards
Martin
2020-11-24 08:59 PM
Configuration TIM1:
TIM1 Internal Clock TIM1_VS_ClockSourceINT VP_TIM1_VS_ClockSourceINT
TIM1 PWM Generation CH1 CH1N TIM1_CH1 PA8
TIM1 PWM Generation CH1 CH1N TIM1_CH1N PA11
TIM1 PWM Generation CH2 CH2N TIM1_CH2 PE11
TIM1 PWM Generation CH2 CH2N TIM1_CH2N PA12
TIM1 PWM Generation CH3 CH3N TIM1_CH3 PA10
TIM1 PWM Generation CH3 CH3N TIM1_CH3N PE12
2020-11-24 09:06 PM
A little more detailed
Configuration of TIM1:
Clock Source : Internal Clock
Channel1: PWM Generation CH1 CH1N
Channel2: PWM Generation CH2 CH2N
Channel3: PWM Generation CH3 CH3N
Counter Settings:
Prescaler (PSC - 16 bits value) 82 *
Counter Mode Up
Dithering Disable
Counter Period (AutoReload Register - 16 bits value ) 100 *
Internal Clock Division (CKD) No Division
Repetition Counter (RCR - 16 bits value) 0
auto-reload preload Enable *
Trigger Output (TRGO) Parameters:
Master/Slave Mode (MSM bit) Disable (Trigger input effect not delayed)
Trigger Event Selection TRGO Reset (UG bit from TIMx_EGR)
Trigger Event Selection TRGO2 Reset (UG bit from TIMx_EGR)
Break And Dead Time management - BRK Configuration:
BRK State Disable
BRK Polarity High
BRK Filter (4 bits value) 0
BRK Sources Configuration
- Digital Input Disable
- COMP1 Disable
- COMP2 Disable
- COMP3 Disable
- COMP4 Disable
- COMP5 Disable
- COMP6 Disable
- COMP7 Disable
Break And Dead Time management - BRK2 Configuration:
BRK2 State Disable
BRK2 Polarity High
BRK2 Filter (4 bits value) 0
BRK2 Sources Configuration
- Digital Input Disable
- COMP1 Disable
- COMP2 Disable
- COMP3 Disable
- COMP4 Disable
- COMP5 Disable
- COMP6 Disable
- COMP7 Disable
Break And Dead Time management - Output Configuration:
Automatic Output State Disable
Off State Selection for Run Mode (OSSR) Disable
Off State Selection for Idle Mode (OSSI) Disable
Lock Configuration Off
DeadTime Preload Disable
Dead Time 0
Asymmetrical DeadTime Disable
Falling Dead Time 0
Clear Input:
Clear Input Source Disable
Pulse On Compare ( Common for Channel 3 and 4 :(
Pulse Width Prescaler 0
Pulse Width 0
PWM Generation Channel 1 and 1N:
Mode PWM mode 1
Pulse (16 bits value) 10 *
Output compare preload Enable
Fast Mode Disable
CH Polarity High
CHN Polarity High
CH Idle State Reset
CHN Idle State Reset
PWM Generation Channel 2 and 2N:
Mode PWM mode 1
Pulse (16 bits value) 0
Output compare preload Enable
Fast Mode Disable
CH Polarity High
CHN Polarity High
CH Idle State Reset
CHN Idle State Reset
PWM Generation Channel 3 and 3N:
Mode PWM mode 1
Pulse (16 bits value) 0
Output compare preload Enable
Fast Mode Disable
CH Polarity High
CHN Polarity High
CH Idle State Reset
CHN Idle State Reset
2020-11-24 11:40 PM
2020-11-24 11:40 PM
2020-11-25 02:47 AM
Dear JW
I have solved the issue.
Thank you.
Best regards
Martin