I am using the Nucleo STM32U385rq development boards to create an I3C controller and a I3C target.
I have the following scenario working:
1) Controller assigns dynamic addresses.
2) Target sends an in-band interrupt.
3) Controller acknowledges the in-band interrupt.
4) Target calls HAL_I3C_Tgt_Receive_IT with a size of 16 bytes.
5) Controller calls HAL_I3C_Ctrl_Transmit_IT with a size of 16 bytes.
6) After the controller received notification of the transmit completion, it starts a timer to do a read after a delay.
6) Target receives the data and calls HAL_I3C_Tgt_Transmit_IT with a size of 16 bytes.
7) Controller timer times out and calls HAL_I3C_Ctrl_Receive_IT with a size of 16 bytes.
8) Target sends the data to the controller.
There are a few issues with this sequence:
a) There doesn't seem to be a way for the Target to be setup to handle a read or write at any time. The Target has to explicitly setup for one or the other and there are times where neither is setup.
b) There seems to be a race condition on the Target from when the in-band interrupt ends and the receive call is made. Without the delay on step 6 in the controller, the Target is not ready in time for the transmit from the controller.
c) The Target has to know what sequence of reads and writes the Controller will make apriori. In the sequence above it is always, IBI > Receive > Transmit. The controller cannot do Transmit > Transmit.
d) The sizes of the transfers have to be known apriori and have the same value on both Controller and Target. Preferably, the read or write can have an End-of-Data with less than the full buffer being transferred.
The issues b, and c are probably due to issue a.
Am I missing something in the Target HAL that makes the typical usage possible (reads, writes, and ibi can happen in any order at any time)?
