Context (brief):
Board: BMS that charges/discharges cells at 1–2 A
MCU: STM32G474RET6 using HSI, 3× ADC, 1× DAC, USB FS (D+, D−), a few GPIOs.
Constraint: Battery sense node carries an unavoidable ~20 MHz component from an external stim source (cannot eliminate at source).
Goal: Accurate voltage sensing while keeping digital/USB activity and power-stage di/dt from polluting ADC/DAC/reference.
What I need advice on (grounding only):
Single solid plane vs split AGND/DGND:
For STM32 with VSSA/VDDA and VSS/VDD, is the consensus to use one continuous GND plane (no hard moat) with functional partitioning—or do you still recommend a true AGND/DGND split in this use case (1–2 A BMS + ~20 MHz on the measured node)?
If “single plane,” where do you prefer the AGND focus/tie—directly under/next to VSSA/VREF+ (shortest loop) versus a separate star just for the analog front end?
If I were to have two separte ground plane
- What component should I connect to AGND, and DGND?: My assumption was that since BMS board ground has lots of current(Charging/Discharging current flowing+ 20MHz signal), I wanted to separte ground for ADC and all the peripherals for the MCU.
- Could you recommend the best strategy for implementing this MCU collaborated and implmented in the one PCB together?
Thank you in advance
I would really appreciate any help regarding this layout recommendation
