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How to use all RAM regions (SRAM1/SRAM2/CCMDATARAM)

JBond.1
Senior

Hi, I am working with STM32F407VETx and it has total 192kb RAM, but its split into 3 regions:

#define SRAM1_BASE 0x20000000UL      // SRAM1(112 KB)
#define SRAM2_BASE 0x2001C000UL      // SRAM2(16 KB)
#define CCMDATARAM_BASE 0x10000000UL // CCM(core coupled memory) data RAM(64 KB)

  0693W00000YA0E4QAL.png 

My question how do I use all those 3 regions?

I assume 1st region (SRAM1) will be used by default by compiler?

Can I simply use 2nd and 3rd regions (SRAM2/CCMDATARAM) by assigning address to variable?

static uint8_t *Cache2 = (uint8_t *)0x2001C000; //16kb sector2
static uint8_t *Cache3 = (uint8_t *)0x10000000; //64kb sector3

Also how is IRAM2 used by compiler? And why there is no IRAM3?

0693W00000Y8qzDQAR.png

1 ACCEPTED SOLUTION

Accepted Solutions

As the regions are linear you can just combine end-to-end

For the CCM you can direct content via linker script or scatter file. Use attribute or section naming. Generally you have to micro-manage this as the linker isn't super-smart.

The CCM could be used for Stack or Heap, but can't be used for DMA buffers on the F4

The Keil list is finite, the scatter file could be more expansive. You could also describe as off-chip RAM

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View solution in original post

2 REPLIES 2

As the regions are linear you can just combine end-to-end

For the CCM you can direct content via linker script or scatter file. Use attribute or section naming. Generally you have to micro-manage this as the linker isn't super-smart.

The CCM could be used for Stack or Heap, but can't be used for DMA buffers on the F4

The Keil list is finite, the scatter file could be more expansive. You could also describe as off-chip RAM

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
PHolt.1
Senior III

Also you can't put the VTOR in the CCM, IIRC.