How to reset TXE flag on SPI slave?

[Guidoted]

I'm simulating some issues on my STM32F412 DMA SPI SLAVE because I need to avoid any unrecoverable situation.

If for any reason the TX is not empty (TXE is 0), I'm not able to reset it (set to 1) even reinitializing the peripheral.

Probably, something is missing in my deinit/reinit functions but I'm not able to find what...

Thanks and best regards

*****

[Danish1 · Accepted solution]

Have you tried setting, then resetting, the appropriate reset bit in e.g. RCC->APB1RSTR (which has bits for SPI2 and SPI3) at the start of your initialisation routine?

I tend to throw in at least one __dsb() between these so I can be sure it has taken; this helped for stm32f7.

Hope this helps,

Danisg

[Guidoted]

Many thanks, Danish.

It seems to have solved my issues, thumbs up!

Best regards

*****

[Piranha]

DSB ensures only that the data has been written out from CPU's write buffer, not actually stored to peripheral register. A better option is to use load instruction on the same register or at least same peripheral. Load instruction takes at least 2 clock cycles and additional cycles are dependent on a bus speed of the particular peripheral, which can be important. I'm using this function and it's siblings for 16 an 8 bit types:

static inline void Cex_DummyRead32(const volatile uint32_t *pAddr, size_t nReads)
{
	uint32_t xDummy; (void)xDummy;
	for (; nReads > 0; --nReads) {
		xDummy = *pAddr;
	}
}

When optimization is turned on, this function is inlined and the loop is unrolled as a bunch of basic load instructions.

[Guidoted]

Many thanks for the suggestion, Piranha.

I think that I have to pass the address of RCC->APB1RSTR and how many nReads do you suggest?

Thanks and best regards

*****