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How to Interface and configure the STM32H563ZI with W25Q256 external memory

Shubham08
Associate II

I was trying to interface W25Q256 with STM32H563ZI in QuadSPI mode as i have done with normal SPI it was working fine as i need to operate at higher frequency than normal spi for continous read and write operation. I tried to read Device information first but i was unable to read the device information mode. 

Shubham08_1-1740990901517.png

This is the parameter that i have set.

Also i have attached the programming file.

I need help in debugging the code and configuring the parameter in stm32cube ide if needed.

 

 

7 REPLIES 7
KDJEM.1
ST Employee

Hello @Shubham08,

Is the Quad mode enabled on both sides in order to communicate properly

- QUADSPI side

- Quad-spi memory side.

I recommend you to look at AN5050 Table 8 and check your OCTOSPI configuration.

 

Thank you.

Kaouthar

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Shubham08
Associate II

Sir i will follow the document and get back if any problm occurs

Shubham08
Associate II

Sir as i was through the document there was section of memory type , from the following memory type which one to select for Winbond 256Mb flash ic.

 

Shubham08_0-1741160114412.png

 

KDJEM.1
ST Employee

Hello @Shubham08,

 

The W25Q256JV memory is a QUAD SPI memory and it’s configured in Quad-SPI mode. 

So, according to AN5050, the memory type has no impact in Quad-SPI mode.

KDJEM1_0-1741181248048.png

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

KDJEM.1
ST Employee

Hello @Shubham08;

 

Any update about this issue?

If your issue is solved please, click on Accept as Solution on the reply which solved your issue or answered your question.

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Shubham08
Associate II

The issue didnt get solved so now i am trying using SPI protocol.

KDJEM.1
ST Employee

Hello @Shubham08,

 

Thank you for updating post.

I noted some a wrong OCTOSPI configuration in your screenshot.

Sample shifting recommended to be enabled in STR mode and disabled in DTR mode.

Delay hold quarter cycle enabled in DTR mode and disabled in STR mode.

Chip select boundary (CSBOUND):The chip select must go high when crossing the page boundary (2^CSBOUND bytes defines the page size).

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.