How to get Segger RTT to work with sleep modes on STM32L0 ?

[Andrew Neil]

A follow-up to this thread - for stm32L433 (Cortex-M4F):

https://community.st.com/s/question/0D53W000014wcE5SAI/how-to-get-segger-rtt-to-work-with-sleep-modes-on-stm32

Like that thread, I already have DBG_SLEEP, DBG_STOP, and DBG_STANDBY set - but the RTT gets "upset" by the CPU sleeping.

Why are these not sufficient for RTT to keep working during sleep?

In that thread, it was found that also enabling one of the DMA channels in RCC_AHB1ENR "seems to do the trick".

So the question is: what would be the equivalent for an STM32L0 ?

(Specifically, the STM32L072 on a B-L072Z-LRWAN1 board)

[Andrew Neil]

Another mention of the RCC_AHB1ENR DMA trick:

https://github.com/zephyrproject-rtos/zephyr/issues/34324#issuecomment-913449671

[Andrew Neil]

Adding __HAL_RCC_DMA1_CLK_ENABLE()  does seem to have helped the RTT stability.

The STM32L0x2 Ref Manual (RM0376) also says, "When one of the DBG_STANDBY, DBG_STOP and DBG_SLEEP bit is set and the internal reference voltage is stopped in low-power mode (ULP bit set in PWR_CR register), then the Fast wakeup must be enabled (FWU bit set in PWR_CR)"