2023-03-17 12:57 AM
i want to generate 50 % duty cycle at freuency (100khz-200 KHz), but i am not getting 50% , i am getting 33-34% duty cycle.this duty cycle change when the frequency change.
2023-03-17 01:11 AM
Show the functions initializing the timer.
Is the frequency as expected?
ARR = N - 1
CCR1 = N / 2
From the scope screen it's hard to see the cycles, or if they are complementary.
Show all registers in TIM1
2023-03-17 01:47 AM
YES ,Frequency is same as expected
2023-03-17 01:48 AM
2023-03-17 01:51 AM
ARR = N - 1
CCR1 = N / 2
for this parameter
ARR = 150-1
CCR1 = 150/ 2
2023-03-17 01:54 AM
2023-03-17 01:59 AM
i am using the stm32 g0b1re Microcontroller Board
2023-03-17 02:08 AM
if i will use the same parametere at 1KHz frequency then i will got the 50% duty cycle.
time clock -64Mhz
prescale-64-1.
so i will get frequency 64/64= 1 Mhz.
and using ARR value = 100
frequency =1M/100= 10 KHz
CRR=50
duty cycle= (50*100)/100= 50 % duty
but when
prescale-1.
and using ARR value = 100
frequency = 317KHz
CRR=50
duty cycle= 25 % duty
using crr =50 and arr 100 why not duty cycle become 50n%?
2023-03-17 02:12 AM
what i m doing wrong ?
2023-03-17 02:17 AM
not wrong, but maybe there is some deadtime active.
timer -> complementary outputs = usually need deadtime .
try setting it very short.
+ set timerclk 64M , no prescaler.
for 10khz out -> arr 6400 , 300khz out -> 210 .