How to force stop PWM pins in complementary.

[Nsg1987]

Hello,

I am working on STM32G474.

I want to operate PWM using GPIO. Below code works find for me. but the issue is that after triggering PWM to stop (only output will be stopped and counter remains working), the PWM of timer 1 takes almost 1.2 seconds to logic 0 level. Is there any other way to force both PWM pins (complemtary) to low level as soon as trigger from GPIO arrived. I want to remove delay of 1.2 seconds which takes to force PWM pins to low.

[AScha.3]

i would use the break feature of tim1 .

set break output state/levels as you like and then , when set brake by software, all outputs go to this state immediately .

[waclawek.jan · Accepted solution]

> The PWM of timer 1 takes almost 1.2 seconds to logic 0 level.

Would you use an oscilloscope instead of LA, you would see a slowly decaying signal - you've threestated the given pin by clearing the respective TIMx_CCER.CCxE/CCxNE bit, but the parasitic capacitances (I guess in your case mainly of a connected relatively big MOSFET) "holds" the charge for some time.

The simplest thing to do is to switch on pulldown on the pin.

If you want to pull the pin down actively, the simplest thing to do is to change the given pin's GPIO_MODER setting from AF to Out (and of course have respective GPIO_ODR set at 0).

A more sophisticated option is to utilize MOE and OSSI (and OISx/OISxN) in the Advanced timers:

JW

[Nsg1987]

Its working now. As suggested above, I pulled down the pins and it is working as expected.