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How to Configure the Timer etc to specific need for GPS aligned ADC sampling

mahapushpa
Associate II

Dear ST team,

I tried to use CubeX, did not able configured as needed. I done separate two timers, the results are not accurate and lots of jitter without any other application.

Need - Using GPS receiver's PPS output to aligned the sampling of external ADC using STM32F411. I have following things, GPS pulse in each board, feed to PA0 and PA1. External ADC which is connected on SPI (16 bits) and Start of conversion pin to PWM out of STM32. The End of conversion pins of ADC to STM32F411, external INT pin. The hardware can be modified if needed, being evaluation kit.

I done like this - 1) PPS to PA0 and IC mode with Rising edge interrupt to find error of timer TIM2_CH1, to calibrate my sampling timer (TIM5). 2) STC of ADC on PA1 (TIM5_CH2) as PWM out and its period is programmed as needed by sampling rate and correction factor based on error from TIM2. The time is not stable, it has jitter. Time being I am not using any other code in MCU.

Does this right or wrong method? If Wrong, what will be best.

Being old user of 8051, the Gated Mode Timer on TIM2-CH2, to calculate error and Drive the PWM Out on PA1 must be more accurate, but it is not possible to configure in CubeX.

The final aim - Align the ADC sampling with Rising edge of PPS, Timer calibration timer counter start and Start of conversion, these three event must be start on Rising edge of PPS. That means they get aligned at every second.

There is one more question, asked about Gated or IC mode of timer eariler.

Thanks in advance

4 REPLIES 4
Uwe Bonnes
Principal III

What timing accuracy do you need? How long do you need to sample. Why do you need to sample GPS PPS aligned at all? Did you check the reference manual, e.g. "Single conversion mode" "external trigger (for a regular or injected channel)"?

mahapushpa
Associate II

I am working for wireless nodes and every node has stm32F411 and external ADC.

The requirement is that each sample (whatever sampling rate) from nodes, ideally zero time and phase error (which is not possible), but must get best. That's why there is GPS receiver PPS input to sync the sampling, do not accumulate error for next second. So it is taken each sec sync based on timer measurement. May be we will take running average of measurement of PPS and update based on scaling factor.

The sampling will be 365x24 hours. The accuracy is needed as much possible, the time error is allowed less than 1 usec. I am running MCU at 100MHz.

How many samples per second?

Why not trigger the external ADC directly from the 1 PPS? Many receivers can also output frequency or have two 1PPS outputs?

TIM1 or TIM8 could be set to do one-pulse modes (multiples with repetition count)

TIM5 could free run at 100 MHz, you could use PWM Input Capture to measure the GPS vs STM32 second times, CH 3 or 4 could be PWM output for triggers

1us is 100 cycles at 100 MHz, surely that's a barn-door one can hit

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mahapushpa
Associate II

The samples per second will be 24000 or 48000 based on setting.

TIM5 could free run at 100 MHz, you could use PWM Input Capture to measure the GPS vs STM32 second times, CH 3 or 4 could be PWM output for triggers. This concept already used with TIM2 (IC) and TIM5 (PWM out). It is working fine with jitter. It has one more problem of bigger code of ISR to calculate the difference of two rising edge counts.

If I can use Gated on TIM2, with TIM_CHN1 as input of PPS pulse, I do not need too much maths, on every falling edge of PPS (/2), if get interrupt, I can read the CNT and clear it for next measurement. In this scheme, I do not able to configure to generate on falling edge of PPS. Otherwise, I need to use one more IO as input (EXTI) to trigger the reading of count, clear and do all the processing. In this case, TIM2 will be Gated one (but CUbex does not allow to set TIM2_CHN1 as Triger source, i.e. problem).