How to achieve coordination between two SP1MLs?

[Pedro Henrique Kopper]

Posted on March 08, 2018 at 18:08

Good evening,

I've been developing a solution using two SP1MLs to control a quadcopter. I'm using MAVLink as the protocol, however I've been getting too high packet losses between the ground station and quadcopter. Both sides use DMA with double-buffering to read the UART, so the problem probably lies in the wireless link. The problem is that both sides must stream data continuously, according to the following scheme:

Quadcopter ? Ground station

MessageSizeInterval

Heartbeat17 bytes1000 ms

Attitude40 bytes50 ms

Obstacles22 bytes50 ms

Ground station ?Quadcopter

MessageSizeInterval

Heartbeat17 bytes1000 ms

Manual control19 bytes20 ms

Misc params?? bytesOn user request

This scheme works fine when only one side is transmitting, however when both are enabled I have over 90% packet loss. The quadcopter is already waiting for the IDLE flag to transmit, however the problem still persists. The relevant configurations are:

ParamValue

Frequency915MHz

Modulation2-FSK

Data rate150kbps

Baud rate

115200

Frequency deviation

300kHz

Filter

500kHz

FEC

Enabled

Based on that, my questions are:

• How can I organize data flow so to avoid packet corruption? Should I implement a command-response architecture? Wouldn't it have too much overhead?
• Are my RF parameters okay? This is my first experience with sub-GHz radios and I'm not sure these parameters are optimal;
• Is there any other thing that could be optimized? I'd be glad to hear any other misc suggestions you might have about this project.

Thanks in advance,

Pedro

(Sorry for any mistake, English is not my native language)

#sp1ml-spirit1-stm32l1-sub-ghz #stm-32 #stm32-projects #sp1ml

[Andrew Neil]

Posted on March 08, 2018 at 21:51

What is an '

SP1ML' ?

EDIT

Oh - you mean this: 

http://www.st.com/en/wireless-connectivity/sp1ml.html

  ?

Why would Google not find that just now?

[Tesla DeLorean]

Posted on March 08, 2018 at 23:06

The radio always prevails as the biggest source of data loss. On some other boards the HAL and CM0 architecture can also manage to corrupt things. 

From a radio perspective I've found the Semtech LoRa radio chips (SX1272, 1276 primarily) to be significantly more robust than other sub-1GHz solutions (Si1000, EZR, etc). The Murata LoRa module integrates a very capable STM32L072CZ with 192KB of FLASH, which can hold the entire radio stack and user application. It uses a TCXO, so good on-frequency design, with good sensitivity.

There are dozens of SX127x based radio modules, and Semtech is working with number of licensees.

[Pedro Henrique Kopper]

Posted on March 08, 2018 at 22:48

Yup, these are the modules I'm talking about. They are NRND now, but weren't when I started using them.

[AvaTar]

Posted on March 09, 2018 at 07:54

This scheme works fine when only one side is transmitting, however when both are enabled I have over 90% packet loss.

First, I would try to find out why you are losing packets.

Are the data corrupted, or can't your code keep up (i.e. is the OVL flag set, or an error flag) ?

Second, DMA seems not appropriate for variable-length packets.

And what happens to your application timing logic if one character is lost or corrupted ?

[Andrew Neil]

Posted on March 09, 2018 at 08:43

This scheme works fine when only one side is transmitting,

however when both are enabled I have over 90% packet loss.

Are these devices actually designed for full-duplex operation?

Usually, that would require a different frequency for 'uplink' and 'downlink' - otherwise they will interfere with each other ...