How many devices can be connected on SPI bus

[SRoy]

Hi,

I would like to know what is max number of SPI slaves I can connect to a single SPI bus of STM32F779? I understand that using the chip select pin I can select respective slaves to operate. But is ther eany recommendation from ST that ideally , I should not exceed this number due to various factors like loading etc. I have 6 devices to be connected. Either I will connect all 6 to 1 bus or 3 devices acorss 2 busses.

[TDK · Accepted solution]

There is no hard limit. You can connect all 6 devices to the same SPI.

If you have very high (>10 MHz) frequency communication, you may want to limit the number and/or do things to improve signal integrity like terminating resistors, but this is more a function of trace length than it is number of devices connected. Long leads may become a problem slightly below this range, but regardless of the number of slaves.

[tjaekel]

SPI bus comes with a nSS signal for each slave. You can connect N slave devices to one SPI master (as long as the capacitive load does not exceed the limit or you have to lower the number N slaves on the same bus).

The "SW issue" is this:

• each MCU SPI can generate a HW nSS signal, but just one!
• so, for N slaves on same SPI "bus" - you need N GPIO signals as nSS: and you have to change from HW generated nSS to SW (GPIO based, your own code) generate nSS

This can generate a "timing issue":
if the HW generates the nSS signal (and only one is possible) - it is in "sync" with the SPI peripheral: nSS is generated when the SCK and other signals (like MOSI) are already in their correct mode (e.g. SPI Mode ); SCK is driven low before all starts).

If you generate now a SW nCC signal: it can be too early: you might set it already to low (as activate a slave) but the SPI SCK signal is still floating (and the slave will see wrong pulses).

For SW nSS signal generation (and you can support up to N slaves, if you have N GPIOs free to generate their SW nSS signals) - it is important to check the SPI bus, when the related nSS signal comes and of all the other signals, esp. SCK, make sense (esp. are not floating still when nSS is low).