GPIO to SRAM using DMA. Is it possible in STM32?

[Pablo Martin]

Posted on April 04, 2017 at 11:19

Hi all,

I am a bit of a newbie to the microcontrollers world and trying to work in my first real project, in which I want to capture data from an external ADC and store it into the embedded SRAM for post processing.

In my initial test I am using an STM32F207 with the Nucleo evaluation board. I configured a GPIO port F as input, just put some random 1s and 0s on the port and transfer it to memory simply by creating an array and copying the GPIO IDR value into the respective elements of the array, a very simple loop as follows:

  unsigned int data_gpiof[1024] = {0};

  unsigned int i = 0;      while (i < 1024) {

         data_gpiof[i] = *((unsigned int*)0x40021410U);

         ++i;        }

In the code, 0x40021410U is the address of the GPIO port F IDR. It works just fine, but the loop takes 13 clock cycles, which is probably too slow for my application.

I was therefore looking for ways to optimize this, and was thinking whether it is possible to use DMA. From the datasheets, STM32 controllers do not support DMA between GPIO and memory, so I was wondering if that is really the case?

It is possible maybe to configure DMA for memory to memory transfer and just set the IDR of the relevant GPIO port?

Otherwise, is there any improvement that you can think of for the code above to make it more efficient?

I can see that the instruction   data_gpiof[i] = *((unsigned int*)0x40021410U); involves many steps at assembly level. I assume there is probably a more efficient way to achieve the same result.

Any advice is welcome.

Thanks in advance!

#DMA, GPIO

[Tesla DeLorean]

Posted on April 04, 2017 at 17:27

I believe I've covered this multiple times here with examples. The F4 examples would translate well to the F2. Search DMA+GPIO or DMA+TIM+GPIO

You need to use DMA2 for these activities as it permits memory-to-memory operation. DMA to/from GPIO banks works, you can also use GPIOx->BSRR as a target to drive individual pins (or subset of whole) from a pattern buffer.

[Tesla DeLorean]

Posted on April 04, 2017 at 17:31

Reliance of fire hosing data from the GPIOx->IDR like this seems to be flawed. You need to process the data, and can't really maintain consistent sample points.

Think about using DCMI interface (14-bit, 54 MHz, synchronous), or FSMC (External bus, to latches or FPGA/CPLD)

There are also FIFO type devices well suited to synchronous capture, asynchronous processing.

[Pablo Martin]

Posted on April 17, 2017 at 19:32

Clive, thank you very much for your help. I sorted this out, it turned out much easier than I expected to get the DMA running!

Thanks!