GPIO configuration for LSE crystal (STM32F102RBT6)

[jmorton]

Posted on November 28, 2011 at 20:11

This should be an easy one for you...

I'm a new STM32 user and I am unsure how to configure the GPIO for PC14-15 when using 32kHz crystal as the LSE.  Do both pins need to be configured as alternate function (PP or OD?) or as input/output?  I would assume alternate, but I've noticed in the examples that, even though the alternate fuction is used, some pins are still configured as I/O ( e.g., USART RX and input-capture). Thanks! #stm32f102rbt6 #stm32-pc14-pc15-gpio-lse #lse #rtfm #gpio

[Tesla DeLorean]

Posted on November 28, 2011 at 20:28

Just leave them unconfigured (should default to passive GPIO inputs), they will not use the standard GPIO pin driver circuits (ie GPIO/AF functions, driving rail-to-rail) when switched into LSE mode.

From the reference manual, a recommended read, we have : 8.3.1 Using OSC32_IN/OSC32_OUT pins as GPIO ports PC14/PC15 The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general-purpose I/O PC14 and PC15, respectively, when the LSE oscillator is off. The LSE has priority over the GP IOs function. Note: 1 The PC14/PC15 GPIO functionality is lost when the 1.8 V domain is powered off (by entering standby mode) or when the backup domain is supplied by VBAT (VDD no more supplied). In this case the IOs are set in analog mode. 2 Refer to the note on IO usage restrictions in Section 4.1.2 on page 61.

[jmorton]

Posted on November 28, 2011 at 20:43

Thanks!

I did RTFM, as well as the datasheet.  It still wasn't clear to me how it should be configured; since the datasheet describes the OSC32_IN/OUT as alternate functions.

[pablovivan]

Posted on June 23, 2012 at 13:52

Hello to everybody,

I am trying everything to be able to use the PC14 and PC15 pins as digital outputs, but I can't get it at all. Obviously I'm not using the LSE.Both pins aer conected  to two MOSFET gates respectively, so there is barely power consum (I'm not trying to drive a LED or anything like that)The information found in the documentation is very, very poor and in the forums isn't more useful.I have assumed that the LSE is off once I turn on the uC and just defining the pins as outputs and using the GPIO_SetBits doesn't work.I have assumed that the LSE is on once I turn on the uC. I inicialized APB1_PWR clock. I enabled the RTC access and I disabled the LSE clock security system and I turned off the LSE explicitly.I think I've tried all the likely combinations and I keep on failing. I`m missing something but I dont realize what is it. I hope you could help me. Thanks in advance.Regrads.

[werbung]

Posted on May 03, 2014 at 12:49

Same Issue: No GPIO Function on PC14 and PC15

This is my RCC initialization of the RTC to disable the LSE but GPIO doesnt work whatever speed 1MHz,10MHz, 50MHz is selected. RCC->APB2ENR  |= ((1UL << 4) );               // Enable GPIOC clock RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); //Enable RCC clock PWR_BackupAccessCmd(ENABLE);   /* Reset Backup Domain */ BKP_DeInit(); RCC_LSEConfig(RCC_LSE_OFF); // PC14 PC15 as GPIO  // Disable LSE     Can someone please post a working LSE Configuration with GPIO PC14 and PC15 working as outputs ? Regards Henry

[Tesla DeLorean]

Posted on May 03, 2014 at 14:23

What specific chip/board are we talking about here? A number of the DISCO boards have solder bridges disconnecting PC14/PC15 from the pin headers.

I've posted other examples for the L1, but this should work with F1 parts

{
GPIO_InitTypeDef GPIO_InitStructure;
/* PWR and BKP Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
/* GPIOC Periph clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
PWR_BackupAccessCmd(ENABLE);
RCC_LSEConfig(RCC_LSE_OFF); // Disable LSE - PC14 PC15 as GPIO 
/* Configure PC14 and PC15 in output pushpull mode */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
}

[werbung]

Posted on May 03, 2014 at 22:53

Thanks Clive for the fast response.

It is not a discovery Board . Its just a LQFP to DIP Adapter Board. So there is direct connection to the Port Pins of the STM32F Battery Pin is directly connected to VD. So if I disconnect the VD for some minutes the BackupDomain should discharge either. With your code the GPIO on PC14 and PC15 are working now. Maybe it has to do with powering down the BackupDomain: But strange enough the PC14 and PC15 are now not disabled even if I do not initialize by commenting all you rinitialize-statements below and poweroff for some minutes.

/* PWR and BKP Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);

/* GPIOC Periph clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
PWR_BackupAccessCmd(ENABLE);
RCC_LSEConfig(RCC_LSE_OFF); // Disable LSE - PC14 PC15 as GPIO 

It behaves as if there are CMOS cells in the BackupDomain which do remember some data for some reason. I will try again with an discovery board.

[Tesla DeLorean]

Posted on May 03, 2014 at 23:20

PC13,14,15 are not generally good GPIO pins, they have limited sink/source of about 3mA as I recall. They are in the backup power domain, powered either from VBAT or the main supply if available.
 If LSE is enabled it will disable the use of the pins for GPIO