2021-11-06 11:27 AM
We are porting applications from STM32F1 to STM32F427 MCU. Currently, we are not explicitly configuring SCB->CCR unaligned trap, based on ARM M4 manual, LDR, VLDR always triggers the fault if the address is not aligned properly.
Do I require to use memcpy while converting the void* to int32? Are there any other solutions to avoid these realignment exceptions?
2021-11-06 12:03 PM
> 0x20008911, which is not unaligned by 4 byte
"not unaligned" is double-negation; "0x20008911 is not aligned" or "0x20008911 is unaligned".
LDR won't trap, VLDR will. Look at disassembly of how this line was compiled - the optimizer may ignore the casts.
Try (float)*(volatile s32*)_data.
JW
2021-11-06 12:12 PM
> Are there any other solutions to avoid these realignment exceptions?
Clear the UNALIGN_TRP bit in SCB->CCR. The Cortex-M4 can handle unaligned access, but I believe it takes a few more cycles.
SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;
Edit: probably due to the floating point instruction which must be aligned.
2021-11-06 12:58 PM
Thanks for your response, yes with volatile machine instructions changed to LDR.
2021-11-06 03:55 PM
Might want to consider how you're managing unaligned memory structures, guessing from a file or external device, etc.
LDRD,STRD are also intolerant of misalignment across the Cortex-M parts.
2021-11-07 10:57 AM
In cmsis_compiler.h are defined macros for unaligned access: __UNALIGNED_UINT32_READ etc.
> Try (float)*(volatile s32*)_data.
This will convert an int value to float ((
C++ has reinterpet_cast but in C it is ugly.