FSMC FMC - Interfacing a memory device with two Chip Select pins

[Zaher]

Well, as you might know, some memory chips have a set of two Chip Select pins, however, the FSMC of the STM32F407 provides only one FSMC_NE1 signal and that's associated with the address space being written/read from (Bank 1 for NE1). On the STM32F429 line, the FMC provides support for CompactFlash and two Chip Select pins are enabled by default. I was wondering if there's any way to do the same on the STM32F407, as I don't need many of the peripherals available on the F429 for my project.

I have these scenarios in mind:

1- Use the STM32F429 (I'm trying to avoid it because it's an overkill for the project)

2- Add some external logic to switch between two Chip Selects

3- Replace the FSMC_NE1 with two CS pins assigned on the GPIO, though I'm not sure about timing constraints and whether this would affect the overall performance writing/reading the external memory-mapped device.

Let me know what do you think

Zaher

[Tesla DeLorean]

Can't you just wire the two pins together or pull one high or low as appropriate? ​

[Zaher]

No, addressing parts/registers of the device concerned works by means of CS0, CS1, in addition to some address bits. Aside from address bits, one CS0 has to be active at a time. DO you mean generating CS signals from GPIO, as I suggested above?

[Tesla DeLorean]

Ok, so different independent selects within the same device.

Y​ou could use high order address bits, and then only access memory such that only one is low.

ie

0x60004000..7FFF

0x60008000​..BFFF

[Zaher]

Yes, two independent chip selects.

But these address spaces are still within the first bank (NOR/PSRAM/SRAM) for FSMC_NE1. Where and how a second Chip Select is incorporated? How about the GPIO approach suggested earlier? And in reference to your reply, "pull one high or low as appropriate" without external logic, how one could achieve that?

[Tesla DeLorean]

I haven't seen the data sheet, but the chip-selects frequently gate with the read/write signals. Alternatively you can OR the address pin you want to use as a chip-select with the FSMC_NE1 to sub-divide the space.

[Zaher]

According to the RM, "Bank 1 used to address up to 4 NOR Flash or PSRAM memory devices. This bank is split into 4 NOR/PSRAM subbanks with 4 dedicated Chip Selects." However, in CubeMX, only NE1 is available when STM32F407 is used. For the STM32F429 with FMC, the 4 sub-banks (4 dedicated NEs) are available.