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FDCAN packet sending stuck on pending (HAL_FDCAN_IsTxBufferMessagePending)

lgabp1
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Hi, I am trying to send classical CAN messages using FDCAN with STM32h723vgT6 - based board. I am however having difficulties sending any packets (and receiving).

 

Hardware setup:

- DM-MC02 board, based on STM32h723vg (https://gitee.com/kit-miao/dm-mc02)

- SIT1042 CAN controller, directly built-in the board. Thus, the respective CAN_H and CAN_L are directly accessible through the board's pin

- (Device) ZDT_Emm_V5.0 stepmotor controller. Anyway it is just the device I am trying to send data to (https://blog.csdn.net/zhangdatou666/article/details/132644047)

- CANable 2.0 - inspired USB device.

 

What I am trying to do:

I want to be able to send and receive classical CAN messages using the DM-MC02 board to drive my controller. Because of my controller's specs, I need to send classical CAN messages with extended IDs at a bitrate of 500 000, by configuring FDCAN (what's supported by STM32h723vg) in normal mode. I would prefer using the CAN1 port of my board.

I am using STM32CubeIDE.

 

What works:

I am able to drive the stepmotor controller with my computer by using python-can through the CAN USB device, which indicates that for the most part my wiring seems okay, and that I do have a somewhat working CAN network. I did check the termination resistor values, all my CAN_H and CAN_L cables are twisted together.

 

What does not work:

My setup is rather simple, the CAN network is made of the DMMC board, CAN USB drive and the Stepmotor controller. For now, I wanted to send data from the board to the CAN USB (and see the messages via python-can or Cangaroo). However, I have no signal from my board.

Basically I am unsure what is missing in my board's configuration or code. I have followed many guides to configure the .ioc, I even found some code by the manufacturer (not the settings I would like to use though, it is for FDCAN 1 250 000, which I am unsure what to think of by the way as, at least for python-can, 1 250 000 seem to be not a supported rate, thus I could not test with it much). For the timing configuration, I have used Kwaser's calculator for FDCAN, I found this configuration (from my understanding, the Data should not matter much with classical CAN) :

lgabp1_0-1748248881502.png

Please find attached my .ioc file and source code, and here is the core of the code.

  if(HAL_FDCAN_Start(&hfdcan1) != HAL_OK)
  {
	  Error_Handler();
  }


  /* Configure Header */
  uint8_t TxData[] = {0xF6, 0x00, 0x05, 0xDC, 0x0A, 0x00, 0x6B, 0x00};
  TxHeader.Identifier = 0x0100;
  TxHeader.IdType = FDCAN_EXTENDED_ID;
  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
  TxHeader.DataLength = FDCAN_DLC_BYTES_8;
  TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
  TxHeader.BitRateSwitch = FDCAN_BRS_OFF;
  TxHeader.FDFormat = FDCAN_CLASSIC_CAN;
  TxHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
  TxHeader.MessageMarker = 0x0; // Ignore because FDCAN_NO_TX_EVENTS
	  
/*...*/

          /* Add message to Tx buffer */
	  if(HAL_FDCAN_AddMessageToTxBuffer(&hfdcan1, &TxHeader, TxData, FDCAN_TX_BUFFER0) != HAL_OK)
	  {
	  	Error_Handler();
	  }

	  /* Send Tx buffer message */
	  if(HAL_FDCAN_EnableTxBufferRequest(&hfdcan1, FDCAN_TX_BUFFER0) != HAL_OK)
	  {
	   Error_Handler();
	  }

		/* Polling for transmission complete on buffer index 0 */
		while(HAL_FDCAN_IsTxBufferMessagePending(&hfdcan1, FDCAN_TX_BUFFER0) == 1) {
			__NOP();
		}

Basically, I found that the code gets stuck in the while(HAL_FDCAN_IsTxBufferMessagePending(&hfdcan1, FDCAN_TX_BUFFER0) == 1) loop, indicating that the buffer has some difficulties getting processed and cleared.

When using "HAL_FDCAN_GetProtocolStatus(&hfdcan1, &status);", I can see that the status struct's DataLastErrorCode and LastErrorCode are set to 7 (No change since last read).

 

When trying to receive messages with a similar code, the program would also get stuck as if there were no new messages.

 

As I cannot make that simple setup work I am a bit at lost on what to do, perhaps the STM32 community could have new ideas.

Please feel free to ask for any details, and I would appreciate any help.

Thanks !

 

20 REPLIES 20

Your IOC file shows the FDCAN clock is 80MHz

Based off that, your settings should be as following to get 500000 bit/s

KarlYamashita_0-1748467166604.png

https://kvaser.com/support/calculators/can-fd-bit-timing-calculator/?v=0.12&nbr=500000&dbr=1000000&nsjw=21&dtps1=40&dtps2=39&f=80000&t=5000&d=200&np=1&dp=1

 

 

Don't worry, I won't byte.
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