In CubeMX 5.3.0 I have configured FATFS and FREERTOS for a card running STM32L431. The HAL SDMMC driver is communicating with SD card, and everything goes well until the FATFS want to read the MBR block from the SD card. In this case, the DMA channel does not move the data from the SDMMC FIFO to memory.
Having debugged and checked both the SDMMC interface and the DMA, it seems that I am left somewhere in the signal path between these two devices.
From the two pictures showing the SDMMC and DMA2 registers at the time the SDMMC controller interrupts after the transfer from the SD card, can anyone see a potential problem?
Supplementary information to the pictures:
For the SDMMC controller:
* In the DCTRL register DMAEN is set to activate the DMA transfere.
* It can be seen that we have a FIFO overrun status due to the DMA not reading the FIFO as expected.
On the DMA side it can be seen that the DMA channel that must be used (DMA2-ch4) is setup with:
* Mapping in the CSELR for the SDMMC controller.
* Setup for the transfere in CCR4.
* Count, source and destination as expected.
In the CCR4 register of the DMA, clearing the EN bit, setting MEM2MEM bit and then again setting EN bit, immediately triggers a complete transfere, interrupting as expected after counting down the CNDTR4 register, so the DMA seems to have internal clocking as expected.
Brg
Mads-l
