Questions about ST's BFB workaround on STM32L072

[Ppeyr.1]

I'm working on a STM32L072, and I want to implement an update over the air. I saw there is an errata about the dual bank boot, and ST has made a workaround on it, and it uses the EEPROM.

Code from the errata sheet:

void SystemInit(void)
{
    /*
        handle the bank switch, it's based on the workaround proposed by ST, about BFB2
        but actually use the UFB bit to switch the bank
        see STM32L072x8/B/Z - Errata sheet
    */
 
    /** address where to store the value allowing to boot on Bank2 and Bank1 */
#define BANK_SELECTION_ADDR   (0x08080070U)
    /** This value indicates that application is on Bank2 */
#define BANK2_SELECTED        (0x37U)
    /** This value indicates that application is on Bank1 */
#define BANK1_SELECTED        (0x73U)
 
    /** Bank 2 Start Address  (192KB) */
#define BANK2_START_ADDRESS_192KB       (0x08018000U)
 
    /* Enable the SYSCFG APB Clock */
    *(__IO uint32_t *) 0x40021034 |= ((uint32_t)0x00000001);
 
    if (((SYSCFG->CFGR1 & SYSCFG_CFGR1_UFB) == 0))
    {
        /* we are in bank1*/
        /************************ Check Data value ************************/
        /* If data value selected to remap Bank2 */
        if (*(__IO uint8_t *)BANK_SELECTION_ADDR == BANK2_SELECTED)
        {
            if (*(unsigned int *)BANK2_START_ADDRESS_192KB > 0x20000000 && *(unsigned
                    int *)BANK2_START_ADDRESS_192KB <= 0x20005004)
            {
                /* 0x1FF00004 is the reset vector of the system flash*/
                void (*start_of_bootloader)(void);
                start_of_bootloader = (void(*)(void)) * (unsigned int *)0x1FF00004;
                start_of_bootloader();
            }
        }
    }
 
    /* Configure the Vector Table location add offset address ------------------*/
#if defined (USER_VECT_TAB_ADDRESS)
    SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}

The documentation is not clear for me.

Is the MCU always run on bank1 on start, even it was running on bank2 before ?

I need many EEPROM space for my case, so the real question for me is: Can I write data in the address: 0x8080C70 ?

0xC00 is the EEPROM bank size. So if I run on bank2, and I write at 0x8080C70, I erase the bank selection data from the bank1 point of view.