2020-03-02 07:57 AM
I have inherited code that received 1400 bytes over a 2mbps serial link. I've increased that to 1892 bytes and on occasion (not always, but frequently enough to be annoying) I receive my buffer "shifted" by one byte and a garbage byte for byte 0 in the buffer. I can shift the data "left" by one byte in a loop and the buffer is correct.
Before enabling DMA I make sure to read the USART until RXNE is cleared.
Anyone else ever seen this and hopefully have a solution?
2020-03-02 09:56 AM
Which STM32?
> Before enabling DMA I make sure to read the USART until RXNE is cleared.
Does this "before enabling DMA" include a clear/set cycle for USART_CR3.DMAR?
JW
2020-03-02 10:43 AM
RXNE being clear doesn't mean that the USART isn't in the middle of receiving something.
Should perhaps correlate these events with data as observed externally via a logic analyzer or secondary capture method.
Is this byte random, zero, what exactly?
Does your protocol permit for synchronization? So for example it can recognize the start of the packet, and recover from extra bytes or byte loss.
Is this signal multiplexed? ie RS-485, or otherwise sharing a single wire using a half-duplex protocol, or transmission medium?
Check also for noise, parity, or framing errors.
Perhaps you can enable RE (receive enable) after configuring the DMA transaction.
2020-03-02 02:21 PM
STM32F072
It did not include a clear of DMAR before its set but now it does. Alas, that doesn't seem to help.