2025-03-19 2:55 AM
Dear forum mmebers,
I am trying to use an STM32U5G9 MCU to drive a Ti SN65DSI86 DSI to eDP converter with no success.
Previously I have evaluated the SN65DSI86 with a Xilinx FPGA as a DSI source where it was working perfectly from 640x480 to 1920x1200 resolution at 60Hz refresh rate. The line rate was up to 900Mbps/lane. At 640x480@60Hz I used 2 lanes and 250Mbps/lane. The SN65DSI86 can be configured to output the VSYNC on one of its GPIO which can be used to verify that DSI data is at least partially correct.
I have also succesfully evaluated the STM32U5G9J-DK1 evaluation board with its display (round, 480x480) so both the STM32U5G9 and Ti SN65DSI86 works.
Now we have manufactured an extension board for the STM32U5G9J-DK1 which has the Ti SN65DSI86 and a DisplayPort connector to drive a monitor. I am trying to use 640x480@60Hz and the STM32's internal test pattern generator in the DSI. Now I can see that the 60Hz VSYNC signal is present on the SN65DSI86 but it gives no picture at all.
What I can not understand if the VSYNC signal is present in the SN65DSI86 DSI receiver why the image is not transmitted to the monitor.
Do somebody have an idea whether I had configured something wrong? (Attached the DSI config.)