Does the Quad-SPI flash on the STM32F769I-EVAL board actually function??

[BBenn]

Going through the process of starting a project from STM32CubeMX with an STM32F769I-EVAL board, I found that the installed Quad-SPI NOR Flash chip is connected such that PB2 -> Quad-SPI Clock. PB2 cannot function as a clock for Quad-SPI per STM32CubeMX and processor data sheet.

Other than bit-banging it, is it somehow functional?? It does not seem that the FMC can operate it!!

[Andreas Bolsch]

PB2->AF9 is QUADSPI_CLK according to datasheet for STM32F765xx, STM32F767xx,

STM32F768Ax, STM32F769xx, DocID029041 Rev 6, see table 11 and/or table 13. And in CubeMX PB2 can be assigned QUADSPI_CLK as well.

[Andreas Bolsch]

Just to mention: I've used PB2 with AF9 as QUADSPI_CLK successfully on STM32F769I-Disco. So I'm pretty sure that the datasheet is correct in this aspect ;)

[Tesla DeLorean]

Pretty sure I've had this working. Use the BSP code and examples, and quit with the CubeMX non-sense.

[BBenn]

Um? I'm obviously missing SOMETHING here - I am looking at ball ("pin") M5 of a STM32F769NI, package TFBGA216 in both STM32CubeMX and that data sheet named DS11189 Rev 5 (Table 10, page 61) and the function list for this pin called out as PB2/BOOT1 doesn't have an alternate function 9!! EVENTOUT seems to be the only alternate function for this pin...?

I cannot locate a document D029041 or any slight variation on it...

Another discrepancy: the pre-installed demo app claims 200 MHz - data sheet and CubeMX both say 180MHz top!!

And yeah, I have to start with CubeMX if I want to use it to generate my own design's fimware basis.

[BBenn]

Doh!!! Never mind. Somehow, the processor became a SMT32F469 - All better now...

[Tesla DeLorean]

https://www.st.com/resource/en/datasheet/stm32f767bi.pdf DocID029041 Rev 6