[DMA] Under which conditions will the NDTR register be reloaded when enabling the stream?

Jan561 · ‎2019-12-19

Hi,

This is what I found in the reference manual:

Once the transfer is completed, this [NDT] register can either stay at zero (when the stream is in normal mode) or be reloaded automatically with the previously programmed value in the following cases:

– when the stream is configured in circular mode.

– when the stream is enabled again by setting EN bit to '1'.

What I understand is, that in circular mode after each transfer the NDT register gets reloaded (which makes obviously sense).

But what happens in the following situations (for non-circular streams):

Stream automatically disabled after last transfer and enabled again
Stream automatically disabled, then configuring other values, then enabled again
Stream manually disabled and then enabled again without configuring other config values
Stream manually disabled and then enabled again with configuring other config values
Stream automatically disabled, then manually disabled, then enabled again
Stream crashed and enabled again

I hope this question isn't that stupid =)

Answers are really appreciated.

waclawek.jan · ‎2019-12-19

NDTR is not one register but two: one into which you write, and a second one, which you read, let's denote them NDTR_W and NDTR_R.

When DMA is enabled, NDTR_W is copied into NDTR_R and then governs the rest of the DMA process. As long as you don't overwrite NDTR_W, every subsequent enable (or "recycle" in circular mode) uses the same, last-written, value from NDTR_W to copy into NDTR_R.

(Btw., the pointer registers are also doubled, but in a different way - there's a read-write register, which does not participate in DMA process except that its content is copied into its "invisible working" counterpart when the channel/stream is enabled/recycled.)

The net effective result is, that you cannot continue an aborted transfer without rewriting the registers, and that also means that you cannot abort/continue a circular transfer at all.

JW

View solution in original post

waclawek.jan · ‎2019-12-19

NDTR is not one register but two: one into which you write, and a second one, which you read, let's denote them NDTR_W and NDTR_R.

When DMA is enabled, NDTR_W is copied into NDTR_R and then governs the rest of the DMA process. As long as you don't overwrite NDTR_W, every subsequent enable (or "recycle" in circular mode) uses the same, last-written, value from NDTR_W to copy into NDTR_R.

(Btw., the pointer registers are also doubled, but in a different way - there's a read-write register, which does not participate in DMA process except that its content is copied into its "invisible working" counterpart when the channel/stream is enabled/recycled.)

The net effective result is, that you cannot continue an aborted transfer without rewriting the registers, and that also means that you cannot abort/continue a circular transfer at all.

JW