2016-05-28 02:37 AM
In RM0351 rev.3 (STM32L4x6, I am lazy to look into other RMs now), in the Peripheral Interconnect Matrix, chapter 9.2., Table 35, there is no connection to DMA indicated; similarly in the subsequent subchapters in chapter 9.
JW2016-05-30 03:43 AM
Hi waclawek.jan,
Ok. I report this internally for check. -Hannibal-2017-05-05 04:51 PM
RM0351 is in rev.5 now and still no DMA in the Peripherals interconnect matrix chapter, which is now chapter 10.
This sort of degrades the point of that chapter.
JW
2018-07-05 05:37 PM
Rev 6.
Still no DMA in 10 Peripherals interconnect matrix.
JW
2018-07-06 03:21 AM
Hello
Waclawek.Jan
,The DMA connections are detailed in the DMA section, that&39s why in the Peripheral Interconnect Matrix we decided to NOT include the DMA connections, but only the connections between IPs, that are not always obvious and require to check in multiple sections of the Reference Manual.
Thank you for your understanding.
With Regards,
Imen
2018-07-06 04:20 AM
Imen,
Thanks for the reply
You imply that the DMA connections are obvious. I beg to disagree.
For example, not all peripherals can trigger DMA transfers. (incidentally, this is not true in the specific case of &39L4/RM0351, but I assume this chapter will eventually appear in all RMs). To find out, which do, one has either to scrutinize the tables in DMA chapter, or the DIER register in the respective timer chapter, or both. Similarly for other peripherals.
Also, this is a great opportunity to point out, that some peripherals employ a true request/acknowledgement latch (e.g. timers) and others don&39t (thus they require the DMA to perform a specific action, usually access the data register of given peripheral) and it may also be an opportunity to point to the mechanism to clear this latch if present
https://community.st.com/0D50X00009XkaAtSAJ
.Also, DMA is (are) present in other RM&39s Interconnection chapter, e.g. RM0316. Omitting it in others does not make sense, and makes migration harder.
Jan