2011-11-07 08:23 AM
Hello everyone,
I have had a couple porblems resolved by sharing with the community here. I am now moving into the toughest part of my project. I am incorporating a Micron VGA CMOS Digital Image Sensor that I have previously had working on an 8051 through an Altera FPGA chip. The image sensor only put out intersperesed 8 bit serial LVDS so I have it going through a de-serializer and all the signals look perfectly fine as expected. I have 1 byte of data the Pixel clock and H and V Syncs all wired into the STM3220g eval board, which has the F207IG on board. Now that the quick introduction is out of the way. Let me get started out with what I am seeing. I have DMA setup to transfer a picture into SRAM and this is happening, except for the fact that all my image data is exactly the same. The DMA is transferring 0x04040404 into memory as that is all that is put in the data register. I know this is not all the data that the camera is putting out as it I have it setup in test mode putting out a grayscale image. I know that it is seeing something from the camera though as it is not getting anythign in the data register when i disconnect the camera. I do notice some discrepencies between the memory map file and the reference manual from what I am actually seeing in the DCMI_SR. In Crossworks Studio I am seeing: DRDY CECS SECS CEIS SEIS Where in the reference manual it is showing: FNE VSYNCE HSYNC Has anyone else noticed these differences or know what the CECS,SECS, CEIS, SEIS may stand for? The DRDY, CECS, and SECS flags are the onse being set. When DRDY is set so is CECS, and SECS is reset. When SECS is set, DRDY and CECS are reset. Regarding my issue, I know I really didn't address with a question as I am a bit confused still with working with this DCMI. I will at keep everyone posted on my progress. Please if you have any experience using DCMI and are willing to share I am willing to read! Thanks, Brad2011-11-27 05:38 PM
After a little breather I'm back on the case.
What PXLCLK output data rates from the image sensor are you guys obtaining? I still can't get higher than 24MHz and then I get overun error on the DCMI buffer. I'm now also working with an F4 at 168MHz but can't get any more out of it than the F2. Frank - The DMA is only used for transferring the image sensor data. There are currently no other streams enabled. Any ideas? Will have a play shortly with some of the double buffering discussed :) Thanks, Mike2011-11-28 07:57 AM
AMSN,
So, I have set it up just as you have showed. And yes, I misread the Double Buffer Config function. I am still seeing what appears to be some sort of wrapping in my image (see link below).http://i352.photobucket.com/albums/r360/stbbrad3/HighResBook.jpg
Perhaps somethign is wrong with my camera, because that data at the bottom is at the beginning of the buffer the DMA is writing to. It is either that or my BMP header info is wrong, but I am highly doubting that. BigM my pixel clock is running at 11MHz and I have the F2 speed up to 120MHz when capturing the image. Thanks2011-11-28 11:32 PM
Brad,
In the DMA TC interrupt, you should update the value of M0AR and M1AR: - First TC interrupt, update the value of M0AR (e.g DMA2_Stream1->M0AR = 0x6407FFF8) - Second TC interrupt, nothing to do - Third TC interrupt, re-initialize the M0AR and M1AR (e.g DMA2_Stream1->M0AR = 0x64000000; DMA2_Stream1->M1AR = 0x6403FFFC;)2011-11-29 10:50 AM
AMSN,
From what I understood in your post before the last, it is only necessary to handle the interrupt if I need to transfer more than 524280 bytes of data, which is not the case. I am only transferring 354944 bytes. I have put the high resolution on hold until I get a new Micro color sensor in, and I think I will do my best to get it working then. Thanks.2011-11-29 01:55 PM
Brad
For what its worth, if you run the camera example from the F4 eval board, you see the same image wrapping that you are seeing. So it's probably not your camera but something more general that's going on. Ian2011-11-30 07:40 AM
Guys,
You are right :) Just you need to extend the address bus of FSMC (FSMC_A18 and FSMC_A19) to handle the highest SRAM address, for this in SRAM_Init() function (stm322xg_eval_fsmc_sram.c file) add the GPIO config for PG13 and PG14. Now you are able to address the 2M bytes SRAM2011-11-30 12:23 PM
Hey everyone,
On the f4 eval board and dcmi example it looks like the fsmc is all hooked up and configured. Definitely missing in the f2 though! Does anyone have any ideas on the image wrapping? I'm also experiencing this issue now. Since I seem to be a step behind everyone I thought I would check to see if anyone had discovered a cause. I'm aslo still interested in the data rate of the dma/dcmi. Our image sensor will output YUV at 48MHz as a standard config. We don't mind slowing it down to 24 which doesn't seem to be a problem, but it is a thorn in our side that we can't figure out why we get the overun error at faster data rates?! In theory it should be more than capable. Thanks.2011-11-30 05:43 PM
Guys
I'm using the STM3220G-Eval board and trying to use the camera examples from the F4 board which are far more expansive. Just to clarify the previous posts, is it just a couple of software patches that are required or are hardware mods to the board required ? Excuse my ignorance but I'm way behind most of you and really struggling with the complexity of this beast. Ian2011-12-01 05:56 AM
2011-12-01 07:12 AM
Hi Brad,
you are right, just add the GPIO config for PD13, PE3, PE4 and PE5 below the details: FSMC pins config: PD13 <-> FSMC_A18 PE3 <-> FSMC_A19 PE4 <-> FSMC_A20 PE5 <-> FSMC_A21 PE6 <-> FSMC_A22 PE2 <-> FSMC_A23 PG13 <-> FSMC_A24 PG14 <-> FSMC_A25 DCMI pins config DCMI_D0 <-> PH9 DCMI_D1 <-> PH10 DCMI_D2 <-> PH11 DCMI_D3 <-> PH12 DCMI_D4 <-> PH14