CPOL & CPHA setting in NSS pulse mode.

[AVasi.11]

RM0440 Rev 7 (STM32G4), 39.5.12 NSS pulse mode.

It is written on the page 1753:

 “This mode is activated by the NSSP bit in the SPIx_CR2 register and it takes effect only if the SPI interface is configured as Motorola SPI master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0, CPOL setting is ignored)�?

Does this means that this mode only works correctly when CPHA = 0, CPOL setting is ignored, CPOL = 1 as shown in Figure 586 and sampling edge is the falling edge?

But The figure 586 below has a Note that says:

“Note: Similar behavior is encountered when CPOL = 0. In this case the sampling edge is the rising edge of SCK, and NSS assertion and deassertion refer to this sampling edge.�?

Means CPOL setting is not ignored?

What are the correct settings for CPHA and CPOL in NSS pulse mode?

[waclawek.jan]

CPOL setting is not ignored as far as clock polarity is concerned.

What the RM wants to say is, that NSSP does work if CPHA=0, and does not work if CPHA = 1, whatever CPOL setting is.

JW

[AVasi.11]

Thank you. Too bad RM is misleading. It's even more unfortunate that SPI in NSS pulse mode doesn't have full functionality.

I need NSS pulse mode and CPHA = 1, CPOL =1 to poll Si8380. The only solution, I think, is to make crutches

[AScha.3]

i use spi with nss on F030 and SI8641EB ; works without problems.

[AVasi.11]

Sorry, I didn't specify the name, it's Si8380S. You are using Si8641 for SPI and Si8380S is polled via SPI

[AScha.3]

ok, so need to look at Si8380S timing and what nss is doing;

nss seem (for my understanding) not working in hardware, only in software is useful here.

and CPHA = 1, CPOL =1 seems correct (for me) .

so set CPHA = 1, CPOL =1 and nss in software.

[AVasi.11]

Ok, I'll try your version.

RM says that NSS only works if CPHA=0.I will also check the hardware NSS option when CPHA=0 and CPOL=0.

Maybe that will work too, If SCK polarity is not important for 8380.