Cortex M0 TIMER 17 Assembly

markjohnson9 · ‎2016-02-11

Posted on February 11, 2016 at 21:54

Anyone who can shed some light on clearing the Status Register flags in Timer 17 by software.

I have enable TIM17 and it has begun its pre-loaded count. The SR flags CC1IF & UIF flags get set when enabled. I need to clear these flags before TIM17 ends it count. Is this possible? Below is some asm code for TIM17 which tries to clear these flags but it cannot. The reference manual indicates the flags can only be cleared by software. Using Keil to monitor flags in TIM17 SR register.

LDR R1,=0x40014834 ;MOVE TIM17_CCR1 ADDRESS TO R1

STR R0,[R1] ;MOVE DATA ELEMENT TO TIM17_CCR1

LDR R1,=0x4001482C; MOVE TIM17_ARR ADDRESS TO R1

LDR R0,=0x960 ;DIGITAL 2400 TIME

STR R0,[R1] ;MOVE 2400 TO TIM17_ARR

LDR R1,=0x40014824 ;MOVE TIM17_CNT ADDRESS TO R1

LDR R0,=0x00 ;MOVE 0 TO R0 FOR CNT = 0

STR R0,[R1] ;TIM17_CNT = 0

LDR R1,=0x40014818 ;MOVE TIM17_CCMR1 ADDRESS TO R1

LDR R0,=2_1110000 ;CC1S = 00, OC1M = 111, PWM2 MODE

STR R0,[R1] ;MOVE TIM17_CCMR1 DATA TO CCMR1 PIN &sharp62 = 1

LDR R1,=0x40014800 ;MOVE TIM17_CR1 ADDRESS TO R1

LDR R0,=0x0000000001 ;CEN = 1

STR R0,[R1] ;TIM17 COUNTER STARTS COUNTING

LDR R1,=0x40014810 ;MOVE TIM17_SR ADDRESS TO R1

LDR R0,=0x00 ;MOV 0 TO R0 FOR TIM17_SR TO BE CLEARED

STR R0,[R1] ;CLEAR TIM17_SR, CC1IF = 0, UIF = 0 ***Will not clear CC1IF & UIF flags***

#timer-17 #arm #cortex-m0

Radosław · ‎2016-02-11

Posted on February 11, 2016 at 22:31

This isn;t bery strange.

1. Did you read programming manual about memory types?

2. try use DSB DSM after writing to SR.

waclawek.jan · ‎2016-02-11

Posted on February 12, 2016 at 07:02

Set DBG_TIM17_STOP bit in DBGMCU_APB2FZR.

JW