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Clarification on SPI6 Peripheral Clock Domain in STM32H747I

SaiGaneshCS
Associate II

Hello,

I am working with the STM32H747I microcontroller and using the SPI6 peripheral to interface with an external ADC (MCP3462RT).

I have observed that when the system clock (SYSCLK) is set to 120 MHz, SPI6 communication works correctly and the ADC provides valid data. However, when SYSCLK is configured to 480 MHz, the ADC starts giving wrong readings even though SPI6 does not hang.

To debug this further, I need clarification:

  1. On the STM32H747BIT6, is SPI6 clocked from APB4 (via RCC_APB4ENR) or from another APB domain?

  2. If SPI6 is indeed on APB4, does its effective clock depend on D2PCLK1/D2PCLK2 or directly on D3PCLK4?

  3. Are there any known limitations when running SPI6 at high system clock frequencies (SYSCLK = 480 MHz)?

Understanding the exact clock domain of SPI6 will help me tune the prescaler and ensure reliable ADC communication.

Thanks in advance for your support.

Best regards,
Sai Ganesh CS

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