2025-10-11 12:16 PM
I am incorporating STM32C011J6M6 (SO8 package) in a new project. This is my first use of C0 series (previously only F1 series, and previously only LQFP48 package.)
The STM32C011J6M6 makes available both Port B bit 7 (B7) and Port C bit 14 (C14) on pin 1 of the SO8 package. This is the pin I'm initially working with as it would provide a specific interface capability in my project.
My question/problem is this - can I configure both port/bit peripherals (B7 and C14) as enabled on pin 1, provided that the two assignments are electrically compatible (they would both be used open drain, and both be idling in the "GPIO set" (or active high) state?
There is a reason for this request - port C14 would be used as a USART_TX peripheral in single-wire, async half-duplex, open drain mode, and port B7 would be used as a GPIO input or output in open drain mode. This way I could use the pin as half duplex async, but also be able monitor the pin continuously to see if it has been externally pulled down (it would then defer the normal async activity on the same pin.)
As I could not find anything (yet) in the documentation (datasheet or reference manual) that tells me about this "overloaded" use case, I've resorted to an experiment (where the port is initialized twice, once for each of the two port bits, the results suggests that the second initialization in sequence prevails over the first initialization in sequence).
What I've tried so far:
I used STM32Cube MX to generate a short programs, one initializing B7 as GPIO_OD (open drain output), and verified that the program can control the pin's state (floating or pulled down), then another doing the same but with C14. These work independently (letting me have the pin float or be pulled down.)
I then combined the two GPIO Initialization routines (generated by STM32Cube MX) into one program (the other generated initialization code for clocks was identical, and only used once.)
From what I've observed, the second GPIO pin initialization routine (example, port bit C14) renders the first GPIO initialization routine (example, port bit B7) moot. I can reverse the sequence (in the code) calling these two initialization routines; the second one in sequence prevails, leaving the first port bit inaccessible to the physical pin.
Before I give up on this approach, I'd like know if this idea (of overloading two port bits onto the same pin) is normally doable?
I've not posted code (segments or in whole) but would be happy to do this; the code is generated by STM32CubeMX and I'm using current versions of STM32CubeMX and STM32CubeIDE.
Thank you for any advice, pointers, requests for clarification, and requests for code samples.