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Can't increase USART Baud above 130Kbps?

craig239955_stm1_st
Associate II
Posted on September 29, 2014 at 23:16

Hi all,

I've been getting familiar with the RCC stuff on the STM32L152 (STMrecently152L-Discovery), but I'm struggling to push the baud rate of my USART transmission beyond 130Kbaud. I've set up the SysClk to use the PLL, after dividing the HSI down to 12MHz (16MHz*3/4). That's far faster than the default 2MHz it was running on before so seems to me like it should be plenty headroom for the USART to be able to up its speed. What I'm seeing though when I set the Baud to > 130Kbps though is the actual Baud rate dropping to near 200bps on the scope. I'm not sure if there's a stage of configuration I'm missing, but I think I've been looking at it so long I wouldn't even be able to spot it now. I know my clock config is working okay in terms of the SYSCLK, because setting up my MCO pin using the SYSCLK will output the expected 12MHz.

RCC_MCOConfig(RCC_MCOSource_SYSCLK,RCC_MCODiv_1);

Clock configuration:


/* Configure the clocks as required */

void
Clock_cfg(
void
){



// Enable HSI //

RCC_HSICmd(ENABLE);


// Enable Prefetch Buffer //

FLASH_PrefetchBufferCmd(ENABLE);


// Flash 0 wait state //

FLASH_SetLatency(FLASH_Latency_0);


// HCLK = SYSCLK // HCLK derived from SCLK 

RCC_HCLKConfig(RCC_SYSCLK_Div1); 


// APB1 Clock 

RCC_PCLK1Config(RCC_HCLK_Div1);


// APB2 Clock 

RCC_PCLK2Config(RCC_HCLK_Div1);


// Set PLL clock as HSI*8/4 = 16MHz/2 

RCC_PLLConfig(RCC_PLLSource_HSI, RCC_PLLMul_3, RCC_PLLDiv_4);


// Enable PLL 

RCC_PLLCmd(ENABLE);


// Wait til PLL is ready 

while
(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);


// SysClk/AHB clock config // Set from PLL Clock 

RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);


// Wait till PLL is used as system clock source 

while
(RCC_GetSYSCLKSource() != 0x0C);




}

USART config:


// Configure pin for USART TX

GPIO_IS.GPIO_Pin = USART_TX; 
// Configure pin 

GPIO_IS.GPIO_Mode = GPIO_Mode_AF; 
// Set as output 

GPIO_IS.GPIO_OType = GPIO_OType_PP; 
// Push/pull

GPIO_IS.GPIO_Speed = GPIO_Speed_40MHz; 
// 40MHz clk

GPIO_IS.GPIO_PuPd = GPIO_PuPd_UP; 
// Pull-up

GPIO_Init(USART_PORT, &GPIO_IS); 


// Configure alternate functions

GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2); 
// PA2 - USART2_TX


// Configure USART

USART_IS.USART_BaudRate = 140000;

USART_IS.USART_WordLength = USART_WordLength_8b;

USART_IS.USART_StopBits = USART_StopBits_2;

USART_IS.USART_Parity = USART_Parity_No;

USART_IS.USART_HardwareFlowControl = USART_HardwareFlowControl_None;

USART_IS.USART_Mode = USART_Mode_Tx;

//Apply structure

USART_Init(USART2, &USART_IS);


// Enable USART

USART_Cmd(USART2, ENABLE);

Any advice or ideas would be very welcome! #usart-rcc-clock-frequency-baud
2 REPLIES 2
Posted on September 30, 2014 at 02:46

You should be attentive to what the APB clocks are, as the peripheral, and it's baud clock, come from there.

A bus running at 12 MHz could achieve 130435 baud with a 130kbaud programmed rate, the error coming from the achievable division.
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craig239955_stm1_st
Associate II
Posted on September 30, 2014 at 08:36

Perhaps I'm being naive here, but surely before I changed my clock speed and assigned the SYSCLK the PLL's 12MHz, it and all my other clocks would be running at 2MHz from the MSI? At this point I was managing to get 130Kbaud from my USART too. As far as I can see I've set the source of my HCLK (AHB clock) as the SCLK.

I should be clear that my end goal here is to be able to drive the USART at 250Kbps in order to transmit DMX512 packets.

The problem I'm experiencing is that I can't drive it faster than 130Kpbs despite having increased (at least I think I have) the AHB and APB1 clocks.What else could the problem be? How can I go about debugging this more than I already have?