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Can SDRAM Work with Cross-Connected FMC Lines on STM32H7?

BrolyChen
Associate

For STM32H7, if the FMC data lines and SDRAM data lines are cross-connected (not D0 to D0), and address lines are also cross-connected (not A0 to A0), can SDRAM work properly?

My PCB is about to be manufactured, but due to the hardware engineer’s design, the SDRAM data lines and the MCU’s FMC data lines, as well as the SDRAM address lines and the MCU’s FMC address lines, are not connected one-to-one according to the CubeMX standard. Instead, the order has been shuffled. The actual wiring relationships are as follows:

Data line connections:

MCU FMC_D0 is connected to SDRAM_D13
MCU FMC_D1 is connected to SDRAM_D14
MCU FMC_D13 is connected to SDRAM_D1
MCU FMC_D14 is connected to SDRAM_D0
MCU FMC_D4 is connected to SDRAM_D7
MCU FMC_D5 is connected to SDRAM_D6
MCU FMC_D6 is connected to SDRAM_D5
MCU FMC_D7 is connected to SDRAM_D4
Address line connections:

MCU FMC_A0 is connected to SDRAM_A2
MCU FMC_A1 is connected to SDRAM_A3
MCU FMC_A2 is connected to SDRAM_A0
MCU FMC_A3 is connected to SDRAM_A1
MCU FMC_A4 is connected to SDRAM_A4
MCU FMC_A5 is connected to SDRAM_A5
In other words, the MCU’s FMC data lines and SDRAM data lines, as well as the address lines, are “cross-connected” rather than D0 to D0, A0 to A0, etc. This is not IO remapping (not moving FMC_D0 to another pin), but rather FMC_D0 is physically connected to SDRAM_D13, and so on. Moreover, the corresponding MCU IO cannot be mapped to the corresponding SDRAM data bit.

My questions are:

In this situation, can SDRAM still work properly? Can functions like memcpy and malloc work correctly?
If not, is there any way to fix this through software configuration or code? Would such a fix have a significant impact on performance?
Are there any cases or official documents explaining whether this kind of “cross-connection” is feasible?
Thank you very much for your help!

1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Super User

If you ensure all read/writes are 16-bits, then you can do these swaps. Otherwise, no.

There is probably a way to do this in the FMC.

If you feel a post has answered your question, please click "Accept as Solution".

View solution in original post

2 REPLIES 2
TDK
Super User

If you ensure all read/writes are 16-bits, then you can do these swaps. Otherwise, no.

There is probably a way to do this in the FMC.

If you feel a post has answered your question, please click "Accept as Solution".
mƎALLEm
ST Employee

Hello,

To my knowledge you can shuffle data lines but for the address you can only shuffle inside the rows, inside the columns and inside the banks. Not possible for example to cross the SDRAM rows and columns.

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