can I use JTDO and NJTRST pins as GPIO ?

[mehmet.karakaya]

Posted on October 24, 2010 at 18:06

can I use JTDO and NJTRST pins as GPIO ?

#stm32f2-stm32f2xx-jtrst-gpio #stm32f2-jtrst-gpio-remap

[Tesla DeLorean]

Posted on May 17, 2011 at 14:12

I want use PB3 PB4 as GPIO but they are assigned as JTDO and NJTRST as main function after reset

can I use these pins as GPIO ? ( actually as digital input ) Yes, you have to remap the JTAG/SWV function off the pins, and be sure not to assert the inputs until you have done so. Refer to the Debug Support section of the Reference Manual RM0008

[gordon239955_st]

Posted on May 01, 2013 at 16:31

I have so far been unable to find out how to do this on STM32F2.

I'm looking specifically at nJTRST and both the manual and MicroXplorer say I can use that pin (PB4) as GPIO. I can't see a way to turn off or remap the AF .. I've tried remapping to a non-existent AF, but to no avail. Is there actually a way to make PB4 an ordinary GPIO? Thanks,                 Gordon.

[gordon239955_st]

Posted on May 01, 2013 at 16:33

My earlier post said it failed, but obviously it didn't :|

[Tesla DeLorean]

Posted on May 01, 2013 at 18:44

Program GPIOB_MODER to something other than AF, see GPIOx_MODER page in reference manual.

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; // Not AF See also STM32F2xx_StdPeriph_Lib_V1.1.0\Project\STM32F2xx_StdPeriph_Examples\GPIO\JTAG_Remap\main.c Internal settings will of course not impact what the pin is physically connected to externally.

[crnmo2]

Posted on September 25, 2014 at 22:54

A year and a half later, I am faced with the same issue. I came to the same conclusion is 'clive1', but that does not work when the output is to be set to low.

I make the pin's adjustments to make it into an output. The other settings don't matter (speed, pullups, etc.). As long as the output is set high, everything is fine. Soon (up to several seconds) after I set the output low the processor mysteriously resets. Must be missing something else. This is using a STM32L151CBT6.

[Tesla DeLorean]

Posted on September 26, 2014 at 21:43

I guess if you connected it to NRST it would reset quicker...

Sounds like some issue with externally connected circuitry, review.

[crnmo2]

Posted on September 27, 2014 at 02:47

After taking your advice, I realize that it is something much more mysterious, but nothing related to this thread. Setting the GPIO to a mode that is not AF0 does take it out of NJTRST mode. But for me, when setting this bit low it appears to turn off the LSE clock, at least to timers 10 & 11, causing a IWDG event that I didn't see earlier. (If I use the internal clock, the timers keep on ticking.)

The strange thing is that on a similar design, this all appears to work. Again, a different thread if I plan to pursue this. Thanks for making me look a bit harder.