2024-04-18 06:48 AM - edited 2024-04-20 11:53 PM
-Hi, wanted to know, how to go about having a parallel bus shared by microcontroller and fpga.
-fpga and microcontroller both r/w from external sram over the same bus.
1. What should be the configs for microcontroller : fsmc in memory to memory with DMA2 burst?
2. Will fpga and microcontroller both be masters in the bus. how can writing only 1 device is handled?
please check
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2024-04-21 08:05 PM
The MCU isn't going to share or arbitrate the bus.
Put whatever logic you need to manage things in the FPGA
2024-04-20 11:37 PM - edited 2024-04-21 12:03 AM
I'm reading about fsmc, parallelly wanted to know about the implementation from experts.
Also the idea is to directly pass sram data to lcd (on a different interface) rather than having whole data in internal memory.
2024-04-21 08:05 PM
The MCU isn't going to share or arbitrate the bus.
Put whatever logic you need to manage things in the FPGA
2024-04-22 06:57 AM - edited 2024-04-22 09:07 PM
Thanks. Does arbitration in FPGA double the I/O's requirement for parallel bus?
Please can I know any reference diagram
2024-04-22 09:56 PM - edited 2024-04-25 09:42 PM
Closing this thread.... Will try soon and come up with queries soon...