Bidirectional GPIO Functionality

[SHobb.1]

I need to integrate an STM32G071RBT into an existing design with a parallel bidirectional data bus. Based on section 7.3.10 of RM0444, I believe I should be able to do this by configuring my GPIO as open drain. In this configuration, if an external component on the bus drives the pin low, my input data register should reflect this. Is this understanding correct? Because the integrated pull-ups are so weak (40k?), I plan on using external 10k resistors.

Also, looking at the component (64 pin LQFP), there is no PD7 -- the pins in port D are PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD8, PD9. Why the omission? It just seems strange... Is there something special about Port D that would make me NOT want to use PD0 - PD6 + PD8 for my 8 bit bus?

[gbm]

Regarding the bus: yes, it will work that way. Internal pullups should be enough up to circa 50 kHz, maybe more.

Usually the last or the least useful port's pins are omitted if there are not enough pins available in the case.

[MM..1]

You mix in and out. OD type is for output config on GPIO. And on multi IC bus still exist risk you set OD out to zero and other IC set high. One with higher power wins...

Skipped port pins is based on package pin count you choice...