2023-04-06 01:48 AM
Hi,
I want to use OTA in stm32h743, for that I need to switch between two bank after flash write, as per reference manual
//HAL_FLASH_OB_Lock();
HAL_FLASH_OB_Unlock();
/* Set OPTSTRT Bit */
SET_BIT(FLASH->OPTSR_PRG, FLASH_OPTCR_SWAP_BANK);
/* Wait for OB change operation to be completed */
status = FLASH_OB_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
/* Set OPTSTRT Bit */
SET_BIT(FLASH->OPTCR, FLASH_OPTCR_OPTSTART);
/* Wait for OB change operation to be completed */
status = FLASH_OB_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
if(READ_BIT(FLASH->OPTSR_CUR, FLASH_OPTCR_SWAP_BANK) != 0U)
{
UARTSendString(RS232_PORT, (unsigned char*)"Bit Set \r\n\r\n");
}
//__disable_irq();
HAL_NVIC_SystemReset();
i wrote some code
HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
{
if(READ_BIT(FLASH->OPTCR, FLASH_OPTCR_OPTLOCK) != 0U)
{
/* Authorizes the Option Byte registers programming */
WRITE_REG(FLASH->OPTKEYR, FLASH_OPT_KEY1);
WRITE_REG(FLASH->OPTKEYR, FLASH_OPT_KEY2);
/* Verify that the Option Bytes are unlocked */
if (READ_BIT(FLASH->OPTCR, FLASH_OPTCR_OPTLOCK) != 0U)
{
return HAL_ERROR;
}
}
return HAL_OK;
}
but it is not working please guide me for this
2023-04-06 02:10 AM
Hello @ykn ,
I recommend you this article that will help you on how to configure swap bank based on an STM32H7 example:
Hope this helped you.
Imen
2023-04-06 07:30 AM
I have almost done the above thing, Now I got the error
Break at address "0x812bb84" with no debug information available, or outside of program code.
currently working on bank 1 and want switch to bank 2. One addition thing i have added is
HAL_NVIC_SystemReset();
this functin , the manual implied that you need to reset the sysytem.
Thankinh you
2023-04-07 06:02 AM
I came to know that, the break point address is hardfault
void HardFault_Handler(void)
{
8100a26: b480 push {r7}
8100a28: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8100a2a: e7fe b.n 8100a2a <HardFault_Handler+0x4>
why should I get hardfault.
Checklist
MEMORY
{
FLASH (rx) : ORIGIN = 0x08100000, LENGTH = 1024K
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
}
#if defined(USER_VECT_TAB_ADDRESS)
#if defined(DUAL_CORE) && defined(CORE_CM4)
/*!< Uncomment the following line if you need to relocate your vector Table
in D2 AXI SRAM else user remap will be done in FLASH BANK2. */
/* #define VECT_TAB_SRAM */
/*#if defined(VECT_TAB_SRAM)*/
#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00100000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#else
/*!< Uncomment the following line if you need to relocate your vector Table
in D1 AXI SRAM else user remap will be done in FLASH BANK1. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* DUAL_CORE && CORE_CM4 */
#define FLASH_BANK1_BASE (0x08000000UL) /*!< Base address of : (up to 1 MB) Flash Bank1 accessible over AXI */
#define FLASH_BANK2_BASE (0x08100000UL) /*!< Base address of : (up to 1 MB) Flash Bank2 accessible over AXI */
#define FLASH_END (0x081FFFFFUL) /*!< FLASH end address */
/* Legacy define */
#define FLASH_BASE FLASH_BANK2_BASE
Please some one guide where i am wrong.
I have done the same task using custom bootloader and that worked fine. buth same the thing i tried with bank swapping i got hardfault error.:expressionless_face: