2023-11-24 07:11 AM
AN5290 discusses a workaround for the "When VDD exceeds 2.5V in LDO configuration a glitch on HSE may create a hard fault on M4/M0" issue identified in the errata. In the AN5290 section titled "1.2 LDO configuration for VDD > 2.5 V" recommends:
The recommended values (see Figure 3) are:
• Inductance: 1.8 ± 0.1 nH, 6 GHz ± 15% self-resonance frequency, 1000 mA rated
current (for example, Murata LQG15HS1N8B02)
• Resistor: 2.2 Ω, able to support 1 W for 5 ns (for example, Vishay D10/CRCW0402e3)
However in Figure 3 it shows a 1.2nH inductor.
Not sure if this is the correct form to identify these discrepancies, so if someone could let me know the best location for these issues that would be great.
Solved! Go to Solution.
2023-11-24 09:19 AM - edited 2023-11-24 09:20 AM
Hi again @alexRossRBR
Thank you for having reported this issue.
An internal ticket (number: 167173) is submitted to escalate this issue internally for check and analysis.
(PS: number 167173 is an internal tracking number and not available outside of ST).
Best Regards.
STTwo-32
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2023-11-24 07:13 AM
Hello @alexRossRBR
thank you for your request. I will check this internally and come back to you as soon as possible.
Best Regards.
STTwo-32
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2023-11-24 09:19 AM - edited 2023-11-24 09:20 AM
Hi again @alexRossRBR
Thank you for having reported this issue.
An internal ticket (number: 167173) is submitted to escalate this issue internally for check and analysis.
(PS: number 167173 is an internal tracking number and not available outside of ST).
Best Regards.
STTwo-32
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.